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l q qt60325, qt60485, qt60645 p reliminary 32, 48, 64 k ey qmatrix ? k eypanel s ensor ic s advanced second generation qmatrix controllers up to 32, 48 or 64 touch keys through any dielectric panel thicknesses to 5 cm or more 100% autocal for life - no adjustments required keys individually adjustable for sensitivity, response time, and many other critical parameters mix and match key sizes & shapes in one panel passive matrix - no components at the keys moisture suppression capable aks? - adjacent key suppression feature synchronous noise suppression sleep mode with wake pin spi slave or master/slave interface to a host controller low overhead communications protocol 44-pin tqfp package applications automotive panels machine tools atm machines touch-screens appliance controls outdoor keypads security keypanels industrial keyboards the qt60325, qt60485, and qt60645 digital charge-transfer (qt) qmatrix? ics are designed to detect human touch on up to 32, 48, or 64 keys respectively using a scanned, passive x-y matrix. it will project the keys through almost any dielectric, e. g. glass, plastic, stone, ceramic, and even wood, up to thicknesses of 5 cm or more. the touch areas are defined as simple 2-part interdigitated electrodes of conductive material, like copper or screened silver or carbon deposited on the rear of a control p anel. key sizes, shapes and placement are almost entirely arbitrary; sizes and shapes of keys can be mixed within a single panel of keys and can vary by a factor of 20:1 in surface area. the sensitivity of each key can be set individually via simple functions over the spi port, for example via quantums qmbtn program. key setups are stored in an onboard eeprom and do not need to be reloaded with each power-up. these ics are designed specifically for appliances, electronic kiosks, security panels, portable instruments, machine tools, or similar products that are subject to environmental influences or even vandalism. they permit the construction of 100% sealed, watertight control panels that are immune to humidity, temperature, dirt accumulation, or the physical deterioration of the pan el surface from abrasion, chemicals, or abuse. to this end the devices contain quantum-pioneered adaptive self-calibration, drift compensation, and digital filtering algorithms that make the sensing function robust and survivable. the devices use short dwel l times and quantums patent-pending aks? feature to permit operation in wet environments. the parts use a passive key matrix, dramatically reducing cost over older technologies that require an asic for every key. the key-matrix can be made of standard flex material (e.g. silver on pet plastic) or ordinary pcb material to save cost. external circuitry consists of an opamp, r2r ladder-dac network, a common pld, a fet switch, and a small number of resistors and capacitors which can fit into a footprint of roughly 8 sq. cm (1.5 sq. in). control and data transfer is via a spi port wh ich can be configured in either a slave or master/slave mode. qt60xx5 ics make use of an important new variant of charge-transfer sensing, transverse charge-transfer , in a matrix format that minimizes the number of required scan lines to provide a high economy of scale. l q copyright ? 2001 quantum research group ltd pat pend. r1.05/0802 ss yg x7 drdy led vss vdd ms ain csr cz1 x3 x4 x5 x6 xs vdd vss yc0 yc1 yc2 yc3 mosi miso sclk rst vdd vss xto xti x0 x1 x2ws yc4 yc5 yc6 yc7 avdd agnd aref ys2 ys1 ys0 cz2 1 2 3 4 5 6 7 8 9 10 11 23 24 25 26 27 28 29 30 31 32 33 44 43 42 41 40 39 38 37 36 34 35 12 13 14 22 21 19 20 18 17 16 15 qt60325 qt60485 qt60645 tqfp-44 QT60645-AS -40 0 c to +105 0 c qt60485-as -40 0 c to +105 0 c qt60325-as -40 0 c to +105 0 c qt60645-s 0 0 c to +70 0 c qt60485-s 0 0 c to +70 0 c qt60325-s 0 0 c to +70 0 c tqfp t a available options
21 1 0x31 - delta signal for single key ....................... 21 0 0x30 - signal for single key .......................... 21 5.3 status commands ................................. 21 y 0x79 - column keys scope ........................... 21 x 0x78 - row keys scope ............................. 21 s 0x53 - all keys scope .............................. 21 s 0x73 - specific key scope ........................... 21 5.2 scope commands ................................. 20 p 0x70 - put command .............................. 20 g 0x67 - get command .............................. 20 5.1 direction commands ............................... 20 5 commands & functions ............................. 19 4.6 eeprom corruption ................................. 19 4.5 sensor echo and data response ....................... 18 4.4 spi master-slave mode ............................. 16 4.3 spi slave-only mode ............................... 16 4.2 protocol overview ................................. 16 4.1 serial port specifications ............................. 16 4 serial interface ..................................... 16 3.22 esd / noise considerations .......................... 15 3.21 power supply and pcb layout ........................ 15 3.20 oscilloscope sync ................................ 15 3.19 csr drive polarity ................................ 15 3.18 led / alert output ................................ 14 3.17 sleep_wake / noise sync ........................... 14 3.16 startup / calibration times .......................... 14 3.15 oscillator ....................................... 14 3.14 reset input ..................................... 14 3.13 water film suppression ............................ 13 3.12 r2r resistor ladder .............................. 13 3.11 sample capacitors ................................ 13 3.10 opamps ....................................... 13 3.9 pld circuit and charge sampler ....................... 12 3.8 burst spacing .................................... 12 3.7 intra-burst spacing ................................. 12 3.6 burst length & sensitivity ............................ 12 3.5.2 noise coupling into y lines .......................... 12 3.5.1 rfi from y lines ................................ 12 3.5 'y' gate drives .................................... 12 3.4.2 noise coupling into x lines .......................... 9 3.4.1 rfi from x lines .................................. 9 3.4 'x' electrode drives .................................. 9 3.3 signal path ........................................ 9 3.2 matrix scan sequence ................................ 9 3.1 part differences ..................................... 9 3 circuit operation ..................................... 8 2.12 device status & reporting ............................. 8 2.11 boundary error reporting ............................. 8 2.10 full recalibration ................................... 8 2.9 adjacent key suppression (aks?) ....................... 7 2.8 reference guardbanding .............................. 7 2.7 positive recalibration delay ............................ 7 2.6 detect integrator (?di?) ................................. 6 2.5 detection recalibration delay ........................... 6 2.4 drift compensation ................................... 6 2.3 hysteresis ......................................... 6 2.2 positive threshold ................................... 5 2.1 negative threshold .................................. 5 2 signal processing .................................... 5 1.4 communications .................................... 5 1.3 matrix configuration .................................. 4 1.2 circuit model ....................................... 4 1.1 field flows ........................................ 4 1 overview ............................................ 39 9 index ............................................. 38 8.2 marking ......................................... 38 8.1 dimensions ...................................... 38 8 mechanical ........................................ 37 7.5 maximum drdy response delays ....................... 36 7.4 timing ......................................... 36 7.3 dc specifications .................................. 36 7.2 recommended operating conditions ..................... 36 7.1 absolute maximum specifications ...................... 36 7 electrical specifications ............................ 35 6 pld source listing ................................. 34 5.7 timing limitations ................................. 32 5.6 function summary table ............................ 30 ^w 0x17 - noise sync ............................... 30 ^v 0x16 - boundary equation constant c2 ................... 30 ^u 0x15 - boundary eqn constant c1, lsb .................. 30 ^t 0x14 - boundary eqn constant c1, msb .................. 29 ^s 0x13 - cs clamp polarity ............................ 29 ^r 0x12 - oscilloscope sync ........................... 29 ^q 0x11 - data rate selection .......................... 29 z 0x5a - enter sleep ................................ 29 w 0x57 - return part signature ......................... 29 v 0x56 - return part version ........................... 28 r 0x72 - reset device ............................... 28 l 0x6c - return last command character ................... 28 b 0x62 - recalibrate keys ............................. 28 l 0x4c - lock reference levels ......................... 28 d 0x44 - dac test ................................. 28 6 0x36 - eeprom checksum ........................... 28 5.5 supervisory / system functions ........................ 27 ^p 0x10 - adjacent key suppression (?aks?) .................. 27 ^o 0x0f - negative reference error band ................... 27 ^n 0x0e - positive reference error band .................... 27 ^m 0x0d - intra-burst pulse spacing ....................... 26 ^l 0x0c - negative recalibration delay ..................... 26 ^k 0x0b - positive recalibration delay ..................... 26 ^j 0x0a - detect integrator limit ......................... 26 ^i 0x09 - positive drift compensation rate ................... 26 ^h 0x08 - negative drift compensation rate .................. 25 ^g 0x07 - burst spacing .............................. 25 ^e 0x05 - dwell time in machine cycles ..................... 25 ^d 0x04 - positive threshold hysteresis ..................... 25 ^c 0x03 - negative threshold hysteresis .................... 24 ^b 0x02 - positive detect threshold ....................... 24 ^a 0x01 - negative detect threshold ....................... 24 5.4 setup commands ................................. 24 k 0x4b - key touch reporting for group ................... 23 k 0x6b - reporting of first touched key .................... 23 e 0x65 - error code for selected key ..................... 22 % 0x25 - detect integrator counts for group ................. 22 $ 0x24 - charge cancellation for group .................... 22 # 0x23 - r2r offset for group .......................... 22 " 0x22 - reference levels for group ...................... 22 ! 0x21 - delta signals for group ......................... 22 0x20 - signal levels for group ....................... 22 7 0x37 - general device status ......................... 22 6 0x36 - eeprom checksum ........................... 22 5 0x35 - detection integrator counts ...................... 21 4 0x34 - cz state .................................. 21 3 0x33 - r2r offset ................................ 21 2 0x32 - reference value ............................. ? quantum research group ltd. l q ii www.qprox.com qt60xx5 / r1.05 contents
table 1.1 device pin list slave select for spi direction control; active low io od ss 44 y gate control to drive y dwell timing circuit o yg 43 x7 drive matrix scan o x7 42 data ready output for slave spi mode; active low o od drdy 41 active low led status drive / activity indicator o led 40 ground pwr vss 39 +5 supply pwr vdd 38 spi mode / sync out. connect via 10k resistor to vcc or gnd for mode. scope sync yields pulse. i/o od ms 37 analog input from amplifier i ain 36 charge integrator reset line. active high or active low (select polarity via setups) o csr 35 charge cancellation drive for cz1 capacitor o cz1 34 charge cancellation drive for cz2 capacitor o cz2 33 transfer switch control bit 0 o ys0 32 transfer switch control bit 1 o ys1 31 transfer switch control bit 2 o ys2 30 analog reference, connect to vcc pwr aref 29 analog ground pwr agnd 28 +5 supply for analog sections pwr avdd 27 y 7 line clamp control o yc7 26 y 6 line clamp control o yc6 25 y 5 line clamp control o yc5 24 y 4 line clamp control o yc4 23 y 3 line clamp control o yc3 22 y 2 line clamp control o yc2 21 y 1 line clamp control o yc1 20 y 0 line clamp control o yc0 19 ground pwr vss 18 +5 supply pwr vdd 17 x summation / r2r dac ladder drive o xs 16 x6 drive matrix scan / r2r dac ladder drive o x6 15 x5 drive matrix scan / r2r dac ladder drive o x5 14 x4 drive matrix scan / r2r dac ladder drive o x4 13 x3 drive matrix scan / r2r dac ladder drive o x3 12 x2 drive matrix scan / r2r dac ladder drive / wake from sleep / sync to noise source o x2ws 11 x1 drive matrix scan / r2r dac ladder drive o x1 10 x0 drive matrix scan / r2r dac ladder drive o x0 9 oscillator drive input. connect to resonator or crystal, or external clock source. i xti 8 oscillator drive output. connect to resonator or crystal. can drive a charge pump circuit for vee supply o xto 7 ground pwr vss 6 +5 supply pwr vdd 5 reset input, active low reset i rst 4 spi clock. in master mode is an output; in slave mode is an input i/o pp sck 3 master-in / slave out spi line. not used in master/slave spi mode. in slave mode outputs data to host (out only). i/o pp miso 2 master-out / slave in spi line. in master/slave spi mode is used for both communication directions. in slave spi mode is the data input (in only). i/o pp mosi 1 description type name pin i/o: i = input o = output pwr = power pin i/o = bi-directional line pp = push pull output drive od = open drain output drive ?quantum research group ltd. l q iii www.qprox.com qt60xx5 / r1.05
1 overview qmatrix devices are digital burst mode charge-transfer (qt) sensors designed specifically for matrix geometry touch controls; they include all signal processing functions necessary to provide stable sensing under a wide variety of changing conditions. only a few external parts are required for operation. the entire circuit can be built within 8 square centimeters of pcb area. qmatrix devices include charge cancellation methods which allow for a wide range of key sizes and shapes to be mixed together in a single touch panel. these features permit the construction of entirely new classes of keypads never before contemplated, such as touch-sliders, back-illuminated keys, and complex warped panel shapes, all at very low cost. the devices use an spi interface running at up to 1.5mhz to allow key data to be extracted and to permit individual key parameter setup. the interface protocol uses simple single byte commands and responds with single byte responses in most cases. the command structure is designed to minimize the amount of data traffic while maximizing the amount of information conveyed. in addition to normal operating and setup functions the device can also report back actual signal strengths and error codes. qmbtn software for the pc can be used to program the ic as well as read back key status and signal levels in real time. qmatrix parts employ transverse charge-transfer ('qt') sensing, a new technology that senses changes in the charge forced across an electrode by a digital edge. the parts are electrically identical with the exception of the number of keys which may be sensed. 1.1 field flows figure 1-1 shows how charge is transferred across an electrode set to permeate the overlying panel material; this charge flow exhibits a high dq/dt during the edge transitions of the x drive pulse. the charge emitted by the x electrode is partly received onto the corresponding y electrode which is then processed. the parts use 8 'x' edge-driven rows and 8 'y' sense columns to permit up to 64 keys. keys are typically formed from interleaved conductive traces on a substrate like a flex circuit or pcb (figure 1-2). the charge flows are absorbed by the touch of a human finger (figure 1-3) resulting in a decrease in coupling from x to y. thus, received signals decrease or go negative with respect to the reference level during a touch. water films cause the coupled fields to increase slightly, making water films easy to distinguish from touch. 1.2 circuit model an electrical circuit model is shown in figure 1-5. the coupling capacitance between x and y electrodes is represented by cx. while the reset switch is open, a sample switch is gated so that it transfers charge flows only from the rising edge of x into a charge integrator. on the falling edge of x, the switch connects the y line to ground to allow the charge across cx to neutralize to zero. the voltage change on the output of the charge integrator after each x edge is quite small, on the order of a few tens of millivolts. changes due to touch are typically under 0.1% of total integrator voltage. the x pulse can be repeated in a burst of up to 64 pulses to increase the change in integrator output voltage due to touch during an acquire (section 3.6) to increase gain. the charge detector is an opamp configured as an integrator with a reset switch; this creates a virtual ground input, making the y lines appear low impedance when the sample switch is closed. this configuration effectively eliminates cross-coupling among y lines while greatly lowering susceptibility to emi. the circuit is also highly immune to capacitive loading on the y lines, since stray c from y to ground appears merely as a small parallel capacitance across a virtual ground. the circuit uses an 8-bit adc, with a subranging structure to effectively deliver a 14-bit total conversion 'space' (see figure 1-6 and section 3.3). in this way the circuit can tolerate very large ? quantum research group ltd. l q 4 www.qprox.com qt60xx5 / r1.05 figure 1-3 field flows when touched figure 1-4 fields with a conductive film overlying panel x element y element figure 1-2 sample electrode geometries parallel lines serpentine spiral figure 1-1 field flow between x and y elements overlying panel x element y element
absolute signals yet still respond to very small signal changes. subranging is provided by two offset mechanisms which can be thought of as 'coarse' and 'fine' offsets. the 'coarse' method uses one or two switched cz capacitors to subtract charge from the charge integrator to create up to two step offsets, to bring the analog signal back to a more reasonable level. this action occurs during the course of the burst. the 'fine' method of offset uses an 8-bit r2r ladder dac driven by the x drive lines to create an offset in the amplifier stage. the dac is driven after the burst has ceased and the charge accumulated, so there is no conflict in this dual-use of the x lines. short sample gate dwell times after the x edges will limit the effect of moisture spreading from key to key by taking advantage of the rc filter-like nature of continuous films; a short dwell time will limit the time that the charge has to travel through the impedance of the film (section 3.13). this effect is independent of the frequency of burst repetition, intra-burst pulse spacing, or x drive pulse width. burst mode operation permits reduced power consumption and reduces rf emissions, while permitting excellent response time. 1.3 matrix configuration the matrix scanning configuration is shown in figure 1-5. the x drives are sequentially pulsed in groupings of bursts; an 8:1 analog mux acts as the sample switch for all y lines. at the intersection of each x and y line in the matrix itself, where a key is desired, should be an interdigitated electrode set similar to those shown in figure 1-2. the outermost electrode or the key border should always be connected to an x drive; flooding the area around keys with x fill to a width of up to 10mm can help in suppressing moisture films further. although it is referred to as a ?matrix?, there is no restriction on where individual keys can be located. the term ?matrix? refers to the electrical configuration of keys, not the physical arrangement. consult quantum for application assistance on key design. 1.4 communications the device uses two variants of spi communications, slave-only and master-slave. over this interface is a command and data transfer structure designed for high levels of flexibility using minimal numbers of bytes. for more information see sections 4 and 5. device variations: refer to section 3.1 for differences between the parts covered by this datasheet. 2 signal processing the devices calibrate and process all signals using a number of algorithms specifically designed to provide for high survivability in the face of adverse environmental challenges. they provide a large number of processing options which can be user-selected to implement very flexible, robust keypanel solutions. 2.1 negative threshold see also command ^a, page 24 the negative threshold value is established relative to a key s signal reference value. the threshold is used to determine key touch when crossed by a negative-going signal swing after having been filtered by ? quantum research group ltd. l q 5 www.qprox.com qt60xx5 / r1.05 figure 1-5 qt60xx5 basic circuit model 0 0 1 1 + x drive (1 of 8) y line (1 of 8) x electrode y electrode sample switch (1 of 8) cx cs reset switch cz2 cancellation switches 8-bit offset dac xn + cz1 amp charge integrator to 60xxx adc from 60xxx offset control ou t v 0 reset switch sample sw itch amp out xn ca 0 0 1 1 + x drive (1 of 8) y line (1 of 8) x electrode y electrode sample switch (1 of 8) cx cs reset switch cz2 cancellation switches 8-bit offset dac xn + cz1 amp charge in te gra tor to 60xxx adc from 60xxx offset control ou t v 0 reset switch sample sw itch amp out xn ca figure 1-6 circuit block diagram (8x8 matrix shown) charge integrator transfer mux gain amp x0 x1 x2 x3 x4 x5 x6 x7 y0 y1 y2 y3 y4 y5 y6 y7 integrator reset ? ? signal offset r2r dac charge cancellation 1 transfer select ? + - keymatrix charge cancellation 2 transfer strobe timing & charge neutralizing control (pld) qt60xx5 spi to host ? x {1..7} x7 x0 x1 x2 x3 x4 x5 x6 x7 yc0 . yc1 . yc2 . yc3 . yc4 . yc5 . yc6 . yc7 . x0 . x1 . x2 . x3 . x4 . x5 . x6 . xs . xs ys0..ys2 c z1 c z2 cz1 cz2 csr ain charge integrator transfer mux gain amp x0 x1 x2 x3 x4 x5 x6 x7 y0 y1 y2 y3 y4 y5 y6 y7 integrator reset ? ? signal offset r2r dac charge cancellation 1 transfer select ? + - keymatrix charge cancellation 2 transfer strobe timing & charge neutralizing control (pld) qt60xx5 spi to host ? x {1..7} x7 x0 x1 x2 x3 x4 x5 x6 x7 yc0 . yc1 . yc2 . yc3 . yc4 . yc5 . yc6 . yc7 . x0 . x1 . x2 . x3 . x4 . x5 . x6 . xs . xs ys0..ys2 c z1 c z2 cz1 cz2 csr ain
the detection integrator (section 2.6). larger absolute values of threshold desensitize keys since the signal must travel farther in order to cross the threshold level. conversely, lower thresholds make keys more sensitive. as cx and cs drift, the reference point drift-compensates for these changes at a user-settable rate (section 2.4); the threshold level is recomputed whenever the reference point moves, and thus it also is drift compensated. the negative threshold is programmed on a per-key basis using the setup process described in section 5. 2.2 positive threshold see also command ^b, page 24 the positive threshold is used to provide a mechanism for recalibration of the reference point when a key's signal moves abruptly to the positive. these transitions are described more fully in section 2.7. positive threshold levels are programmed in using the setup process described in section 5 on a per-key basis. 2.3 hysteresis see also command ^c and ^d, page 25 refer to figure 2-1. qt60xx5 ics employ programmable hysteresis levels of 12.5%, 25%, or 50% of the delta between the reference and threshold levels. there are different hysteresis settings for positive and negative thresholds which can be set by the user. the hysteresis is a percentage of the distance from the threshold level back towards the reference, and defines the point at which the detection will drop out. a percentage of 12.5% is less hysteresis than 25%, and the 12.5% hysteresis point is closer to the threshold level than to the reference level. the hysteresis levels are set for all keys only; it is not possible to set the hysteresis differently from key to key on either the positive or negative hysteresis levels. 2.4 drift compensation see also command s ^h, ^i, page 26 signals can drift because of changes in cx and cs over time and temperature. it is crucial that such drift be compensated, else false detections and sensitivity shifts can occur. the qt60xx5 compensates for drift using setups, ^h and ^i. drift compensation (figure 2-1) is performed by making the reference level track the raw signal at a slow rate, but only while there is no detection in effect. the rate of adjustment must be performed slowly, otherwise legitimate detections could be ignored. the devices drift compensate using a slew-rate limited change to the reference level; the threshold and hysteresis values are slaved to this reference. when a finger is sensed, the signal falls since the human body acts to absorb charge from the cross-coupling between x and y lines. an isolated, untouched foreign object (a coin, or a water film) will cause the signal to rise very slightly due to an enhancement of coupling. this is contrary to the way most capacitive sensors operate. once a finger is sensed, the drift compensation mechanism ceases since the signal is legitimately detecting an object. drift compensation only works when the signal in question has not crossed the negative threshold level (section 2.1). the drift compensation mechanism can be made asymmetric if desired; the drift-compensation can be made to occur in one direction faster than it does in the other simply by setting ^h and ^i to different settings. specifically, drift compensation should be set to compensate faster for increasing signals than for decreasing signals. decreasing signals should not be compensated quickly, since an approaching finger could be compensated for partially or entirely before even touching the touch pad. however, an obstruction over the sense pad, for which the sensor has already made full allowance for, could suddenly be removed leaving the sensor with an artificially suppressed reference level and thus become insensitive to touch. in this latter case, the sensor should compensate for the object's removal by raising the reference level relatively quickly. the drift compensation rate can be set for each key individually, and can also be disabled completely if desired on a per-key basis. drift compensation and the detection time-outs (section 2.5) work together to provide for robust, adaptive sensing. the time-outs provide abrupt changes in reference calibration depending on the duration of the signal 'event'. drift compensation can result in reference levels that are at the boundaries of the 8-bit signal window. when this occurs, saturation is reached and the drift compensation process stops. one of two error flags is set when the signal approaches either end of the signal window; it is up to the host to read these flags and induce a full recalibration via a recalibration command at that time (section 2.10 and command b , page 28) for the key in question. 2.5 detection recalibration delay see also command ^l, page 26 if a foreign object contacts a key the key's signal may change enough in the negative direction, the same as a normal touch, to create an unintended detection. when this happens it is usually desirable to cause the key to be recalibrated in order to restore its function after a time delay of some seconds. the negative recal delay timer monitors this detection duration; if a detection event exceeds the timer's setting, the key will be fast-recalibrated within its current 8-bit window. this form of recalibration is simply one of setting reference = signal, and does not affect offset or cz state; as a result this form of recalibration requires only one burst spacing interval t ? quantum research group ltd. l q 6 www.qprox.com qt60xx5 / r1.05 figure 2-1 thresholds and drift compensation threshold signal hysteresis reference output
o accomplish. only a full recalibration via a reset or a recalibration command will perform a complete recalibration involving both the r2r offset and cz capacitors (section 2.10). after a fast recalibration has taken place, the affected key will once again function normally even if it is still being contacted by the foreign object. this feature is set on a per-key basis using setup ^l. it can be disabled if desired by setting this parameter to zero, so that it will not recalibrate automatically. 2.6 detect integrator ( ? di ? ) see also command ^j, page 26 to suppress false detections caused by spurious events like electrical noise, the qt60xx5 incorporates a 'detection integrator' or di counter that increments with each sample where the signal passes below the negative threshold, until a user-defined di limit is reached, at which point the detection is confirmed and the corresponding detect bit is set. if before the di limit is reached, the signal rises to a point between the hysteresis and threshold levels, the di counter is decremented with each such sample to a limit of zero. if before the di limit is reached, the signal rises above the hysteresis level, the di counter is immediately cleared. when an active key is released, the di must count down to zero before the key state is cleared. clearing a key s di limit disables that key although the bursts for that key continue. the di is extremely effective at reducing false detections at the expense of slower reaction times. in some applications a slow reaction time is desirable; the di can be used to intentionally slow down touch response in order to require the user to touch longer to operate the key. there are 16 possible values for the di limit. 2.7 positive recalibration delay see also command ^k, page 26 a recalibration can occur automatically if the signal swings more positive than the positive threshold level. this condition can occur if there is positive drift but insufficient positive drift compensation, or if the reference moved negative due to a recalibration, and thereafter the signal returned to normal. as an example of the latter, if a foreign object or a finger contacts a key for period longer than the negative recal delay, the key is by recalibrated to a new lower reference level. then, when the condition causing the negative swing ceases to exist (e.g. the object is removed) the signal can suddenly swing back positive to near its normal reference. it is almost always desirable in these cases to cause the key to recalibrate to the new signal level so as to restore normal touch operation. the device accomplishes this by simply setting reference = signal. the time required to detect this condition before recalibrating is governed by the positive recalibration delay command. in order for this feature to operate, the signal must rise through the positive threshold level (section 2.2) for the proscribed user-set interval determined by ^k. after the positive recal delay interval has expired and the fast-recalibration has taken place, the affected key will once again function normally. this interval can be set on a per-key basis; it can also be disabled by setting ^k to zero. 2.8 reference guardbanding see also command s ^n, ^o, page 27; l, page 28 qt60xx5 devices provide for a method of self-checking that allows the host device to ascertain whether one or more key reference levels are 'out of spec'. this feature can be used to determine if an x or y line has broken, the matrix panel has delaminated from the control panel, or there is a circuit fault. guardbanding alerts the host controller when the reference level of a key falls outside of acceptable absolute levels. the guardband is expressed in percent of absolute reference from the reference level of each individual key. the normal reference levels can be locked into internal eeprom via the lock command 'l' during production; deviations in references that fall outside the guardbands centered on these reference levels are then reported as errors. the calculations required for guardbanding are performed after the device has recalibrated or been reset after the l command. positive excursion guarding is treated separately from negative excursion guarding. the possible negative settings are from 1% to 99% of absolute signal reference in steps of 1% as set by command ^o. positive excursions can run from 10% to 1,000% in steps of 10% as set by command ^n. a setting of 0 disables the corresponding guardband direction. since the circuit uses a segmented adc approach with a 'coarse' (based on cz states) and 'fine' (based on r2r ladder drive) offsets, the determination of percentage reference deviation from 'normal' presents a problem. the contributions of the cz caps and the r2r ladder must be factored into the determination in order to make an accurate assessment of the error band. there are three commands which set coefficients used to convert the cz and dac offset values to 'absolute signal' values, according to the following equation, for each key: totalref(k) = (c1 x ncz) + (c2 x offset) + sigref where - totalref(k) is the equivalent absolute reference for key k ; c1 is a global constant set by commands ^t and ^u; c2 is a global constant set by command ^v; ncz is the number of cz caps switched in for key k ; offset is the noted value of the r2r dac for key k ; sigref is the noted current 'window reference' for key k . the percent deviations are computed in relation to totalref(k) on a per-key basis at the time the 'l' command is executed. once the l command has recorded all values of relating to totalref into eeprom, the part will compare the actual running reference level of each key to its corresponding computed totalref value to see if it falls outside the guardbands specified by global parameters ^n and ^o. values which correspond to the reference circuit of figure 3-1 are: c1 = 1513; ^t value = 0x05, ^u value = 0xe9 c2 = 8; ^v value = 0x08 guardbanding tests should not be confused with reference boundary errors (section 2.11). guardbanding can report errors that occur even if the signal is properly centered in the adc window, while reference boundary error reporting cannot. guardband tests do however require that the key ? quantum research group ltd. l q 7 www.qprox.com qt60xx5 / r1.05
being checked be first fully recalibrated in order to allow the cz and dac offset values to alter. if a key is outside of a limit, either of bits 2 and 3 of command 'e' will be set for that key. the error will also appear as an error in a bitfield reported with command 'e'. there is no mechanism by which keys will automatically recalibrate if the reference drifts past a guardband boundary. 2.9 adjacent key suppression (aks ? ) see also command ^p, page 27 qt60xx5 devices incorporate adjacent key suppression ( aks - patent pending) that can be selected on a per-key basis. aks permits the suppression of multiple key presses based on relative signal strength. this feature assists in solving the problem of surface moisture which can bridge a key touch to an adjacent key, causing multiple key presses. this feature is also useful for panels with tightly spaced keys, where a fingertip might inadvertently activate an adjacent key. aks works for keys that are aks-enabled anywhere in the matrix and is not restricted to physically adjacent keys; the device has no knowledge of which keys are actually physically adjacent. when enabled for a key, adjacent key suppression causes detections on that key to be suppressed if any other aks-enabled key in the panel has a more negative signal deviation from its reference. this feature does not account for varying key gains (burst length) but ignores the actual negative detection threshold setting for the key. if aks-enabled keys in a panel have different sizes, it may be necessary to reduce the gains of larger keys relative to smaller ones to equalize the effects of aks. the signal threshold of the larger keys can be altered to compensate for this without causing problems with key suppression. adjacent key suppression works to augment the natural moisture suppression of narrow gated transfer switches (section 3.13), creating a more robust sensing method. 2.10 full recalibration see also command ? b ? , page 28 the devices fully recalibrate on powerup, after a hard reset, a soft reset or after a recalibrate b command using an algorithm that seeks out the optimal level of r2r offset and cz cancellation on a per-key basis. after powerup or a reset the matrix is scanned key by key and appropriate calibrations are set for each in accordance with user-defined setup information. since the circuit can tolerate a very wide signal range, it is capable of adapting to a wide mix of key sizes and shapes having widely varying cx coupling capacitances. if a false calibration occurs due to a key touch or foreign object on the keys during powerup, the affected key will recalibrate again when the object is removed depending on the settings of positive threshold and positive recal delay (sections 2.2 and 2.7). full recalibration is distinct from fast-recalibration, wherein only the reference level is quickly adjusted. full recalibration requires 26 burst cycles to complete whereas fast recalibration requires only one cycle (section 2.5). the time required for recalibration is dependent on the burst spacing setting ^g (section 3.8). individual keys or groups of keys can be recalibrated with a single command depending on the current command scope. the time required to recalibrate many keys is not multiplicative; the cal process for multiple keys runs in parallel. 2.11 boundary error reporting see also commands ? e ? , page 23; ^n, page 27 unlike guardband error reporting, boundary error reporting only works within the active adc signal window segment in which the key's signal resides. complex factoring of cz and offset are not required for these tests, and the tests do not require that the key be recalibrated to see the error condition. drift compensation can cause a key's reference level to move near to the border of the adc's 8-bit signal window; this may make a key inoperable if the reference pegs near zero, depriving the signal of the ability to move further negative when a key is touched. normally the reference level should be reasonably centered within the adc's current range, i.e. at a level of about 128 decimal / 0x80 hex. the truth logic for reference level drift error reporting is: e/b2 = reference > 191 e/b3 = reference < 64 where e/b2 is command 'e' bit 2, and e/b3 is command 'e' bit 3. if either bit is set, the key should be recalibrated using command 'b'. note that guardbanding errors (section 2.8) also use these same bits for error reporting, but guardbanding does not usually affect these bits until after a recalibration. each reference boundary error will also appear as an error in a bitfield reported from command 'e'. there is no mechanism by which keys can be made to automatically recalibrate if the reference drifts past a window boundary. 2.12 device status & reporting see also commands ? 7 ? , page 22; ? e ? , page 23 ; e , page 23 ; k , page 23, k , page 24 the device can report on the general device status or specific key states including touches and error conditions, depending on the command used. usually it is most efficient to periodically request the general device status using command 7 first, as the response to this command is a single byte which reports back on behalf of all keys. 7 indicates if there are any keys detecting, calibrating, or in error. if command 7 reports a condition requiring further investigation, the host device can then use commands e , e , k or k to provide further details of the event(s) in progress. this hierarchical approach provides for a concise information flow using minimal data transfers and low host software overhead. bit 4 of command 7 reports if there is a discrepancy between the eeprom and the flash rom backup of the eeprom in case of data corruption; it is also set whenever a setup parameter has changed but was not yet been copied into flash. see section 4.6. resetting the device will force the eeprom changes to be copied to flash if legitimate, or it will ? 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force an update of eeprom from flash memory if not legitimate. 3 circuit operation two reference circuits are shown in figures 3-1 and 3-2. figure 3-1 shows a circuit having slightly greater precision and sensitivity than that of figure 3-2, however both will perform well in most situations. note that the figure 3-2 circuit must have the cs clamp control (command ^s) polarity set to 0x01 to operate properly. 3.1 part differences qt60xx5 parts use identical circuits and operate in identical manner in all respects, except that only the qt60645 can acquire 64 keys. the qt60325 and qt60485 only acquire 32 and 48 keys respectively, but both still use an 8x8 matrix; any 32 or 48 keys in the matrix can be used. unused keys must be disabled by setting their burst length to zero (command ^f). these devices have their upper keys disabled (keys 32 and 48 and up respectively). upper keys can be enabled by first disabling undesired lower keys so that the maximum number of keys is never exceeded during the setup process. 3.2 matrix scan sequence the circuit operates by scanning each key sequentially, key by key. key scanning begins with location x=0 / y=0. x axis keys are known as rows while y axis keys are referred to as columns . keys are scanned sequentially by row, for example the sequence y0x0 y0x1 .... y0x3, y1x0 y1x1... etc. each key is sampled from 1 to 64 times in a burst whose length is determined by command ^f. a burst is completed entirely before the next key is sampled; at the end of each burst the resulting analog signal is converted to digital by the part s adc. the burst length directly impacts key gain; each key can have a unique burst length in order to allow tailoring of key sensitivity on a key by key basis. 3.3 signal path refer to figures 1-4, 3-1, 3-2, and 3-3. further descriptions can be found in section 1.20. charge gate. only one x row is pulsed during a burst. charge is coupled across a key's cx capacitance from the x row to all y columns. a particular key is chosen by gating the charge from a single y column into a charge integrator. the gate is an 8:1 analog mux whose path is selected by lines ys0, ys1, and ys2; the gate is enabled by a pulse from the pld. the charge integrator is described below. dwell time. the gate must be switched closed just prior to the rising edge of x and must be reopened just after x has finished rising, in order to capture the charge driven across key capacitance cx. the delay time from the rise of x to the opening of the gate is known as the y-sample dwell time . dwell time duration has a dramatic effect on the suppression of signals due to moisture films as described in section 3.13. dwell time is fixed in these devices to 167ns but this can be shortened using an external circuit (section 3.9). charge neutralization. when x falls again, the charge across cx must be neutralized. without neutralization, cx charge would be sampled one time only and not again during operation. to accomplish this, the pld always clamps all y lines to ground except during the rise of x for the key being scanned. charge integrator. the first opamp is configured as an integrator with a reset switch; capacitor cs (c14 in figure 3-1, and c7 in figure 3-2) performs the charge integration function. capacitor ca (c11 in figure 3-1 only) acts to absorb charge momentarily before the figure 3-1 opamp can react to absorb the charge across cs; the value of ca is not critical. a p-channel jfet resets cs between bursts (n-channel mosfet in the case of figure 3-2). the output of the opamp of figure 3-1 swings negative, and as a consequence a negative power supply is required for that circuit; the circuit of figure 3-2 is unipolar and requires only a positive supply. charge cancellation. two cz capacitors are used to cancel charge across cs in stepwise fashion in order to increase signal range. these capacitors can switch during the course of a burst to reduce the final output of the amplifier chain, preventing early signal saturation due to large keys (high cx) and/or long burst lengths. the cz's are normally driven to +5v when not in use; switching them to ground causes a step subtraction of charge from the integrator. signal amplification; offset. at the end of the burst, the charge integrator result is amplified, and an offset from an r2r ladder dac driven off the x drive lines is applied. this offset repositions the final analog signal as close as possible to the center of the adc span, or at about 2.5v. the amount of offset applied is determined during the calibration process. burst / r2r timing. figure 3-3 relates to a particular key being addressed by an x row line and gate control lines ysn. at the end of the burst, the x pins drive the r2r ladder network to generate a correction offset to the amplifier chain. the amplifier must stabilize to within ? lsb (10mv) 8s after the application of the r2r value so that the signal can be accurately sampled by the qt60xx5 on pin ain. signal gain. gain is directly controlled by burst length, amplifier gain, and the value of cs. burst length can be adjusted on a key by key basis whereas av and cs are fixed for all keys. see section 3.6. the detection threshold setting also factors directly into key sensitivity. 3.4 'x' electrode drives the 'x' lines are directly connected to the matrix without buffering. the positive edges of these signals are used to create the transient field flows used to scan the keys. only one x line is actively driving the matrix for scanning purposes at a time, and it will pulse for a burst length for each key as determined by the 'burst length' setups parameter (see command ^f, page 25 and section 3.6). 3.4.1 rfi f rom x l ines x drive lines will radiate a small amount of rfi. this can be attenuated if required by using series resistor in-line with each x trace; the resistor should be placed near to the qt60xx5. typical values can range from 47 to 470 ohms. excessive amounts of r will cause a counterproductive drop in signal strength. rc networks can also be used as shown in figure 4-4. inserted resistors in the x lines also have the positive effect of limiting esd transient currents (section 3.22). ? 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? quantum research group ltd. l q 10 www.qprox.com qt60xx5 / r1.05 figure 3-1 recommended circuit diagram - true summing junction
? quantum research group ltd. l q 11 www.qprox.com qt60xx5 / r1.05 figure 3-2 recommended circuit diagram - single supply
3.4.2 n oise c oupling i nto x lines external noise, sometimes caused by ground bounce due to injected line noise, can couple into the x lines and cause signal interference in extreme cases. such noise can be readily suppressed by the use of series resistors as described above. adding a small capacitor to the matrix line on the qt60xx5 side of the r, for example 100pf to ground near the qt60xx5, will greatly help to reduce such effects. 3.5 'y' gate drives there are 8 'y' gate drives (yc0..yc7) which are active-high; only one of these lines is used during a burst for a particular key. these lines are used to control the pld to ground all unselected y lines, making them low impedance. the selected y line in the matrix remains unclamped by the pld during the rising edge of the x drive line, during the time that the coupled charge from a single key is fed to the charge integrator via the 8:1 analog mux. there are also 3 y-encoded lines ys0..ys2 which select the correct switch to actuate in the analog mux for the desired y line. line yg from the controller acts to trigger the pld s pulse generation circuit, whose pulse width following the rise of an x line is dependent on an rc time constant. this pulse, ye , drives the enable pin of the qs3251 mux low (switch on) just before a positive-going x drive pulse, and high again (switch off) just after the x drive pulse. the time from the rising edge of an x signal to the rising edge of ye is referred to as the dwell time, and this parameter has a direct effect on the ability of the circuit to suppress moisture films (see sections 3.9 and 3.13). after the ye pulse has ceased, the controller and circuit act to ground all y lines via the pld just before the x drive signal goes low; this restores the charge across the matrix keys to a null state, making them ready for another sample. 3.5.1 rfi f rom y l ines y lines are 'virtual grounds' and do not radiate a significant amount of rfi; in fact, they act as sinks for rfi emitted by the x lines since they are virtual grounds. series-r in the y lines is not required for rfi suppression, and in fact series-r can introduce cross-talk among keys. 3.5.2 n oise c oupling i nto y l ines external noise, sometimes caused by ground bounce due to injected line noise, can couple into the y lines and cause signal interference in extreme cases. such noise can be readily suppressed by adding a 100pf capacitor from each y line to a ground plane near the qt60xx5. 3.6 burst length & sensitivity see also command ^f, page 25 the signal gain in volts / pf of cx for each key is controlled by circuit parameters as well as the burst length. the burst length is simply the number of times the charge-transfer ( qt ) process is performed on a given key. each qt process is simply the pulsing of an x line once, with a corresponding y line enabled to capture the resulting charge passed through the key s capacitance cx. qt60xx5 devices use a finite number of qt cycles which are executed in a short burst. there can be from 1 to 64 cycles in a burst, in accordance with the list of permitted values shown for command ^f, page 25. if burst length is set to zero, the burst is disabled but its time slot in the scanning sequence of all keys is preserved so as to maintain uniform timing. increasing burst length directly affects key sensitivity. this occurs because the accumulation of charge in the charge integrator is directly linked to the burst length. the burst length of each key can be set individually, allowing for direct digital control over the signal gains of each key individually. apparent touch sensitivity is also controlled by negative threshold (section 2.1). burst length and negative threshold interact; normally burst lengths should be kept as short as possible to limit rf emissions, but the threshold setting should be kept above a setting of 6 to limit false detections. the detection integrator can also prevent false detections at the expense of slower reaction time (section 2.6). 3.7 intra-burst spacing see also command ^m, page 27 the time between x drive pulses during a burst is the intra-burst pulse spacing. this timing has no noticeable effect on performance of the circuit, but can have an impact on the nature of rf spectral emissions from the matrix panel. the setting of this function can be from 2s through 10s, loosely corresponding to fundamental emission frequencies from 500khz and 100khz respectively. longer spacings require more time to execute and can limit the operational settings of burst length and/or burst spacing (section 5.7). the intra-burst qt spacing has no effect on sensitivity or water film suppression and is not particularly important to the sensing function other than described above. 3.8 burst spacing see also command ^g, page 25 the interval of time from the start of one burst to the start of the next is known as the burst spacing . this is an alterable parameter which affects all keys. shorter spacings result in faster response time, but due to increasing timing restrictions at shorter spacings burst lengths are restricted, limiting the amount of gain that can be ? quantum research group ltd. l q 12 www.qprox.com qt60xx5 / r1.05 figure 3-3 relationship of x and y signals yb xa amp out 'n' pulses / burst r2r value xa yb yb' yb
obtained; see section 5.7. conversely longer spacings permit higher burst lengths but slow down response time. spacings from 250s to 2ms are available. 3.9 pld circuit and charge sampler the pld should be a cmos 22v10 type having no internal pullup or bus-keeper resistors in order to limit leakage current. ict s peel22cv10a z is a good example device, and code for this part can be found in section 6. the pld performs two functions: y line clamping and transfer switch gating. the pld clamps y-lines to ground whenever key charge is not being collected. the charge integrator should only receive charge starting just before an x line goes high, to a point just after the transition (the x-y dwell time ). it is an essential function of the pld to neutralize charge keys during the negative transition of x lines; without this, charge-transfer would cease to function after a single x pulse, and multiple pulse bursts would be impossible. the pld also acts to generate a pulse that sets the dwell time for the qs3251 8:1 charge sampler switch. a simple pld-based rc network controls the qs3251 gate pin e starting from when line yg becomes active to a time after x7 or xs transition high. xs is the logical-or of x0..x6; x8 and xs are or d together in the pld so that any single x line can trigger the timing network. x-y dwell time can be measured with an oscilloscope by timing the interval from xs or x8 to 22v10 output f9. dwell times of 70ns - 90ns work very well to suppress the effects of surface moisture films. longer times are acceptable if such moisture is not anticipated. r2 and/or c5 in figure 3-1 should be adjusted to provide a timing dwell delay from the rise of an x line to the rising edge of y-enable (qs3251) of around 75ns +/-20%. shorter dwell times will begin to cause the suppression of human touch signals as well. if resistors and capacitors are used in line with the x and y matrix lines for emc and esd suppression (section 3.22), excessively short dwell times can seriously deteriorate signal gain. the circuit should be evaluated for the amount of signal loss by comparing delta signals due to touch both with and without the emc circuits. r2 and c5 can be eliminated to provide the full 167ns of dwell time output by the qt60xx5. c5 should be replaced by a connection to ground, and r2 should be open-circuited. source code for one type of recommended 22v10 can be found in section 6. the 22v10 should have conventional cmos i/o structures without bus-keepers or pullup resistors in order to work optimally. while the qs3251 is gated by the signal on its e pin from the pld, the actual switch being controlled is determined by the ys0, ys1, ys2 lines from the qt60xx5. 3.10 opamps the amplifier chain should be configured as shown in figures 3-1 or 3-2. the opamps should have a gbw product of at least 2mhz, have rail-rail cmos outputs, and be able to operate from split-rail supplies (split-rail capable only in the case of figure 3-1). to eliminate leakage current issues the amplifier should be a j fet or cmos input type only. ti s tlc2272 type opamp is a good example of the type of device which should be employed. figure 3-1 circuit: the first opamp is a charge integrator whose output ranges between 0v to -2.5v. a j fet is used as a reset switch for the integration capacitor c14. since most opamps are not fast enough to integrate the nanosecond duration transient charge pulses coming from the y lines and the switched cz capacitors, a large, non-critical capacitor c11 is used to temporarily store transient charge until the opamp can assimilate it over the following microseconds. the second stage opamp must invert the first opamp output in order to provide a positive-going signal to ain of the qt60xx5. this stage is also used to facilitate the introduction of offset from the r2r network (section 3.12). the second stage must be clamped with a low-c diode as shown (bav-99 preferred) so that negative excursions of the amplifier do not under-drive the ain pin of the device. an output resistor further limits possible ain+ currents. without clamping there can be high currents taken from ain which can lead to device latchup, requiring power to be cycled to restore operation. figure 3-2 circuit: the first opamp is a positive-gain high impedance configuration which amplifies the small voltage on cs (c7). the reset transistor is a small-signal n-fet. c7 also receives charge cancellation capacitances c8 and c9. the r2r dac offset is injected into the summing junction of this amplifier. the second stage amplifier has a positive gain that provides final amplification. this design is simpler to implement but has lower gain than the circuit of figure 3-1. 3.11 sample capacitors charge sampler capacitor cs (c14 in figure 3-1, c7 in figure 3-2) should be the values shown. they should be either np0 or c0g ceramic or pps film for thermal stability reasons. the two cz capacitors should be np0 or c0g types only. the transient charge absorber c11 can be a 10% x7r type. more information on how the cs and cz capacitors function is described in section 1.2. the values of capacitance should not be altered from the reference schematics; value changes can cause acquisition gaps to occur which can result in keys that cannot calibrate. 3.12 r2r resistor ladder the r2r ladder network (rn1 in figure 3-1) should have a value of 100k ohms and a precision of 7 or 8 bits. the r2r connects to the summing junction of the first or second opamp depending on the circuit; it is used to offset the analog signal down with increasing binary input value. the r2r value is determined for each key during calibration by an algorithm that seeks to put the signal ain+ at 2.5 volts. this binary value only changes when a key is recalibrated or after powerup during the normal startup calibration cycle; drift compensation does not change r2r drive. the r2r is driven by the matrix x lines; this is possible since ain+ is only read after the completion of each burst, therefore this dual-use of x drive lines does not pose a conflict so long as these lines are not heavily loaded. ? quantum research group ltd. l q 13 www.qprox.com qt60xx5 / r1.05
the rated resistance of an r2r ladder is also its thevenin equivalent resistance which affects the scaling of the offset injected into the amplifier, in terms of mv/bit. the scaling of offset injection also affects the crossover points for the switching of each cz capacitor. if during the calibration cycle the r2r network is found to not provide enough offset to bring the signal to the midpoint of the adc's range, a cz capacitor is switched in to create an additional offset. if the r2r drive value and cz values are not properly matched, the circuit may not be able to converge on all calibration points, i.e. there will be acquisition holes . this will happen if the cz cancellation voltage step is too large with respect to the amount of full-scale influence of the r2r ladder on the analog offset. it is recommended that the reference circuits shown in figures 3-1 and 3-2 should not be altered to avoid problems. 3.13 water film suppression water films on the user surface can cause problems with false detection under certain conditions. water films on their own will not normally cause false detections. the most common problem occurs when surface water bridges over 2 or more keys, and a user touches one of the keys and the water film causing an adjacent key to also trigger. essentially, the water film transports the touch contact to adjacent keys. the recommended circuit suppresses water coupling by means of a short sample dwell time: a short dwell time reduces the signal from resistive films by limiting the amount of time during which charge is collected. charge from distant regions of the film take longer to return, and so a short dwell time will prevent such charge from being sensed. this effect has nothing to do with the frequency of the burst itself, it is purely a time-domain phenomenon; changing the burst or pulse spacings (i.e. sample frequency) will have no effect on water film suppression. to create short dwell times, a cmos pld is configured with a simple timing circuit to control the y gate (section 3.9). mechanical means can also be used to suppress cross- coupling due to moisture films, for example raised plastic barriers between keys, or placing keys in shallow wells or on raised areas to lengthen the electrical path from key to key. aks - adjacent key suppression - is included in these devices to enhance moisture performance (section 2.9). 3.14 reset input the rst pin can be used to reset the device to simulate a power down cycle, in order to bring the part up into a known state should communications with the part be lost. the pin is active low, and a low pulse lasting at least 10s must be applied to this pin to cause a reset. to provide for proper operation during power transitions the devices have an internal brown-out detector set to 4 volts. a reset command, r , is also provided which generates an equivalent hardware reset (page 28). 3.15 oscillator the oscillator can use either a quartz crystal or a ceramic resonator. in either case, the xti and xto must both be loaded with 22pf capacitors to ground. 3-terminal resonators having onboard ceramic capacitors are commonly available and are recommended. an external ttl-compatible frequency source can also be connected to xti; xto should be left unconnected. the frequency of oscillation should be 6mhz +/-2%. 3.16 startup / calibration times the qt60xx5 requires initialization times as follows: 1. from very first powerup to ability to communicate: 2,000ms (one time event to initialize all of eeprom) 2. normal cold start to ability to communicate: 70ms (normal initialization from any reset) 3. calibration time per key vs. burst spacings: spacing = 250s: 425ms spacing = 300s: 510ms spacing = 400s: 680ms spacing = 500s: 850ms spacing = 1ms: 1,700ms spacing = 2ms: 3,400ms to the above, add 2,000ms or 70ms from (1) or (2) for the total elapsed time from reset to ability to report key detections. keys that cannot calibrate for some reason require 5 cal cycles before they report as errors. however, the device can report back during this interval that the key(s) affected are still in calibration via status function bits. 3.17 sleep_wake / noise sync the sleep _ wake and noise sync features depend on the use of pin x2ws as an input. to prevent interference with scan line x2 during acquisitions, a resistor equal to the rating of the r2r ladder (i.e. 100k) must be used in series. the sleep and sync features can be used simultaneously; the part can be put into sleep mode, but awakened by a noise sync signal which is gated in at the time desired. sleep mode: see also command ? z ? , page 29. the device can be put into an ultra low-power sleep mode using the z command. when this command is received, the sleep line must be placed immediately thereafter into a logic-high state. the part will complete an ongoing burst before entering sleep. the part can be awakened by a low transition on the x2ws pin lasting at least 5s. one convenient way to wake the part is to connect pin x2ws to mosi via the 100k resistor, and have the host send a null command to the device. the part will wake and the null command will not be processed. the mosi line in turn requires a pullup resistor to prevent the line from floating low and causing an unintentional wake from sleep. during sleep the oscillator is shut down, and the part hibernates with microamp levels of current drain. when the part wakes, the part resumes normal functionality from the point where it left off. it will not recalibrate keys or engage in other unwarranted behavior. before going to sleep the part will respond with a ' z '. in slave-only spi mode (see section 4.3), the ss line must be floated high by the host as soon as it receives this response; if ss does not float high, sleep will fail and the device will instead completely reset after about 2 seconds. upon waking the part will issue another ' z ' byte back to the host. noise sync: see also command ^w, page 30 . ? quantum research group ltd. l q 14 www.qprox.com qt60xx5 / r1.05
external fields can cause interference leading to false detections or sensitivity shifts. most fields come from ac power sources. rfi noise sources are heavily suppressed by the low impedance nature of the qt circuitry itself. external noise becomes a problem if the noise is uncorrelated with signal sampling; uncorrelated noise can cause aliasing effects in the key signals. to suppress this problem the devices feature a noise sync input which allows bursts to synchronize to the noise source. this same input can also be used to wake the part from a low-power sleep state. the device s bursts can be synchronized to an external source of repetitive electrical signal, such as 50hz or 60hz, or possibly a video display vertical sync line, using the sleep _ wake / noise sync line. the noise sync operating mode is set by command ^w. this feature allows dominant external noise signals to be heavily suppressed, since the system and the noise become synchronized and no longer beat or alias with respect to each other. the sync occurs only at the burst for key 0 (x0y0); the device waits for the sync signal for up to 100ms after the end of a preceding full matrix scan (after key # 63), then when a negative sync edge is received, the matrix is scanned in its entirety again. the sync signal drive should be a buffered logic signal, or perhaps a diode-clamped signal, but never a raw ac signal from the mains. since noise sync is highly effective yet simple and inexpensive to implement, it is strongly advised to take advantage of it anywhere there is a possibility of encountering electric fields. quantum s qmbtn software can show signal noise caused by nearby ac electric fields and will hence assist in determining the need to make use of this feature. if the sync feature is enabled but no sync signal exists, the sensor will continue to operate but with a delay of 100ms from the end of one scan to the start of the next, and hence will have a slow response time. 3.18 led / alert output pin 40 is designed to drive a low-current led, 5ma maximum, active-low. the led will glow brightly (i.e. pin 40 will be solid low) during calibration of one or more keys, for example at startup. when a key is detected, pin 40 will be low for the duration of each burst for which a key is sensed, i.e. with a very low duty cycle. each additional key being detected will also create a low pulse for that key s burst. during all other times, the led pin will be inactive (high). this pin can be used to alert the host that there is key activity, in order to limit the amount of communication between the device and the host. the led / alert line should ideally be connected to an interrupt pin on the host that can detect a negative edge, following which the host can proceed to poll the device for key activations. this pin also pulls low if there is a key error of any kind. note that in sleep mode if the led was on just prior to sleep, it will remain on during sleep. 3.19 csr drive polarity see also command ^s, page 29 the polarity of the cs integrator capacitor reset drive can be set for active high or active low operation using command ^s. in the reference circuit show in figure 3-1, the j fet will reset cs when the drive signal is low, so ^s should be set to 0 . figure 3-2 requires that ^s be set to 1 . this feature allows for operation with the two basic circuit topologies which require different cs reset control polarities. 3.20 oscilloscope sync see also command ^r, page 29 ms pin 37 can output a positive pulse oscilloscope sync that brackets the burst of a selected key. this feature is controlled by the ^r command. more than one burst can output a sync pulse, for example if the scope of the command when set is a row or column, or is all keys. the ^r command is volatile and does not survive reset or power down. this feature is invaluable for diagnostics; without it, observing signals clearly on an oscilloscope for a particular burst is nearly impossible. this pin is also used as a spi mode select pin. in order to prevent a shorted output when the oscilloscope sync is enabled, the ms pin should only be connected to ground or vdd via a m 10k resistor. this function is supported in qmbtn pc software via a checkbox. 3.21 power supply and pcb layout vdd should be 5.0 volts +/- 5%. this can be provided by a common 78l05 3-terminal regulator. ldo type regulators are usually fine but can suffer from poor transient load response which may cause erratic signal behavior. if the power supply is shared with another electronic system, care should be taken to assure that the supply is free of digital spikes, sags, and surges which can adversely affect the circuit. the devices can track slow changes in vcc depending on the settings of drift compensation, but signals can be adversely affected by rapid voltage steps and impulse noise on the supply rail. 0.1f bypass caps from power to ground should be used near every supply pin of every active component in the circuit. vee is a negative supply used by the circuit of figure 3-1; it can range from -3v to -5v. it does not need to be regulated but should be well filtered and free from external fluctuations. figure 3-1 shows a simple, inexpensive charge-pump which is driven from resonator pin xto to generate vee. current requirements of the circuit are approximately 20ma / vdd, 4ma / vee when running. pcb layout: the pcb layout should incorporate a ground plane under the entire circuit; this is possible even with 2-layer boards. the ground plane should be broken up as little as possible. internal nodes of the circuit can be quite sensitive to external noise and the circuit should be kept away from stray magnetic and electric fields, for example those emanating from mains power components such as transformers and power capacitors. if proximity to such components is unavoidable, an electrostatic shield should be considered. the sync feature (section 3.17) can also be invaluable in reducing these types of noise sources. sample layout artwork is available from quantum on request. ? quantum research group ltd. l q 15 www.qprox.com qt60xx5 / r1.05
3.22 esd / noise considerations in general the qt60xx5 will be well protected from static discharge during use by the overlying panel. however, even with a dielectric panel transients currents can still flow into scan lines via induction or in extreme cases, dielectric breakdown. porous or cracked materials may allow a spark to tunnel through the panel. in all cases, testing is required to reveal any potential problems. the devices have diode protected pins which can absorb and protect the device from most induced discharges, up to 5ma. the x lines are not usually at risk during operation, since they are low-resistance output drives. the ycn lines are not directly connected to the matrix and so are not at risk. however the pld and the qs3251 are connected to the y lines and may require additional esd protection. diode clamps can be used on the x and y matrix lines. the diodes should be high speed / high current types such as bav99 dual diodes, connected from vdd to vss with the diode junction connected to the matrix pin. capacitors placed on the x and y matrix lines can also help to a limited degree by absorbing esd transients and lowering induced voltages. values up to 100pf can be used without causing circuit problems. the circuit can be further protected by inserting series resistors into the x and/or y lines to limit peak transient current. values up to 500 ohms can be used in most cases, but if the dwell time is short this resistance can cause a reduction in signal gain. rc networks as shown in figures 4-4 and 4-5 can provide enhanced protection against esd while also limiting the effects of external fields. external field interference can occur in some cases; these problems are highly dependent on the interfering frequency and the manner of coupling into the circuit. pcb layout (section 3.21) and external wiring should be carefully designed to reduce the probability of these effects occurring. of particular note is the length of the connection from the circuit to the key panel. this connection will act as an antenna that will resonate at various radio frequencies to cause interference, and thus should be very short. if rfi pickup is a problem, the connections should be damped using ferrite beads or low-value (22 - 100 ohm) series resistors in all lines including any ground and power lines running in parallel to the panel. spi data noise: in some applications the host mcu can be some distance from the sensor, with the interface coupled via ribbon cable. the spi link is particularly vulnerable to noise injection on these lines; corrupted or false commands can be induced from transients on the power supply or ground wiring. bypass capacitors and series resistors can be used to prevent these effects as shown in figures 4-4 and 4-5. 4 serial interface qt60xx5 devices use an spi serial interface to a host mcu. this port uses a protocol described in section 5. 4.1 serial port specifications qt60xx5's use an spi synchronous serial interface with the following specifications at 6mhz oscillator frequency: max clock rate, fck 1.5mhz data length 8 bits host command space, tcm m 50s response delay to host, tdr1 table 4-1, also, sec. 7 drdy delay from response, tdr2 1s to 1ms multi-byte return spacing, tdr3 15s to 2ms the host can clock the spi at any rate up to and including the maximum clock rate fck. the maximum clock rate of the part in master mode is determined by setup ^q. the part can operate in either master-slave mode or slave-only mode, and is thus compatible with virtually all spi-capable microcontrollers. the spi interface should not be used over long distances due to problems with signal ringing and introduced noise etc. unless suitably buffered or filtered with rc networks as shown in figures 4-4 and 4-5. slower data rates with longer rc timeconstants will provide enhanced resistance to noise and ringing problems. conversion to asynchronous uart format can be accomplished by using a microcontroller with conversion firmware. using such a conversion device the part can communicate with quantum's qmbtn pc software. consult quantum for details. 4.2 protocol overview the spi protocol is based entirely on polled data transmission, that is, the part will not send data to the host of its own volition but will do so only in response to specific commands from the host. run-time data responses, such as key detection or error information, requires simple single-byte functions to evoke a response from the part. setup mode interactions mostly use 2-byte functions from the host to cause the part to alter its behavior; these functions also cause writes to the internal eeprom. the concept of 'scope' is used to allow functions to operate on individual keys or groupings of keys. the scope of subsequent functions can be altered by short initial scope instructions. see section 5 for protocol details. 4.3 spi slave-only mode refer to figures 4-1 and 4-2. select slave-only by floating pin 37 (ms) or tying high via a m 10k resistor. pin 37 also functions as an oscilloscope sync output (section 3.20) and should never be tied directly to a supply rail. in slave mode the host must always be in master mode, as it controls all spi activity including clocking of the ? quantum research group ltd. l q 16 www.qprox.com qt60xx5 / r1.05 figure 4-1 spi connections slave-only master-slave mosi mosi miso miso sck sck drdy p_out p_in ss ss host m c u q t60 x x 5 ms vdd ss mosi mosi sck sck drdy ss host mcu qt60 x x 5 miso miso ms 10k
interface in both directions. unlike hardware spi slaves, qt60xx5's need processing time to respond to functions. drdy is used to let the host know when data is ready for collection; it indicates to the host when data is ready in response to a command so that the host can clock over the data. this mode requires 5 signals to operate: mosi - master out / slave in data pin; used as an input for data from the host at all times. this pin should be connected to the mosi pin of the host device. miso - master in / slave out data pin; used as an output for data to the host at all times. this pin should be connected to the miso pin of the host device. sck - spi clock - input only clock pin from host. the host must shift out data on the falling edge of sck; the qt60xx5 clocks data in on the rising edge of sck. important note: sck must idle low just before and after ss transitions either up or down, or the transmission will fail; between bytes sck should always idle low. sck should never float. ss - slave select - input only; acts as a framing signal to the sensor from the host. ss must be low before and during reception of data from the host. it must not go high again until sck line has returned low; during data or echo response it must not go high until after the host has sensed that drdy has gone high from the device. ss must idle high. ss has an internal pullup resistor. drdy - data ready - active-low - indicates to the host that the part is ready to send data back subsequent to a command from the host. this pin idles high. the drdy pin has an internal pullup resistor inside. internal pullup resistors note: the internal pullup resistors can range from 35k to 120k ohms. if rc filtering is used on the spi lines per figure 4-4, this resistance may not be low ? quantum research group ltd. l q 17 www.qprox.com qt60xx5 / r1.05 table 4-1 typical drdy (tdr1) response delays (burst length = 12) 300us 300us 300us 300us 300us 400us all other commands 800us 800us 800us 800us 1ms 1ms get key errors (e), get keys pushed (k) 2ms 2ms 2.5ms 2.5ms 2.7ms 3ms calibrate command (all keys) 800ms 800ms 800ms 800ms 800ms 800ms lock reference levels ('l') command 300ms 300ms 300ms 300ms 300ms 300ms setup - put (affect 64 keys) 40ms 40ms 40ms 40ms 40ms 40ms setup - put (affect 8 keys) 10ms 10ms 10ms 10ms 10ms 10ms setup - put (affect 1 key) 2ms 1ms 500s 400s 300s 250s function type burst spacing figure 4-2 spi slave-only mode timing sck {from host} mosi {from host} miso {from sensor} invalid data optional byte 2 host command byte 1 null dummy data null dummy data invalid data response data or echo nth response data { n = c o m m a n d d e p e n d e n t } drdy {from sensor} ss {from host} 7 6543210 7 6543210 7 6543210 7 6543210 7 6543210 7 6543210 t dr1 t cm t dr2 t dr3 figure 4-3 spi master/slave mode timing sck mosi optional byte 2 from host to sensor command byte 1 from host to sensor ss t dr1 response byte or echo from sensor to host nth byte from sensor {n = command dependent} ss, sck, mosi originate from host ss, sck, mosi originate from sensor 7 6543210 7 6543210 7 6543210 7 6543210 floating t cm t dr3
enough to ensure adequate signal risetime and may need to be augmented with external 10k pullups. the host must wait until drdy goes low before an spi transfer to retrieve data. for multi-byte responses, the host must observe drdy' to see when it goes high again after each data byte, then low again, before executing another transfer to get the next data byte. the host should send null bytes (0x00) to retrieve data. if the drdy line does not go low after a command, the command was not properly received or it was inappropriate. the delay to drdy low depends on how many bytes of data are being loaded into eeprom; table 4-1. absolute worst case delays are found in section 7; these timings occur only rarely, for example if the device happens to be busy with adjacent key suppression calculations, which occurs only at the moment when a key is first detected. a typical slave-only function sequence is as follows: 1) the host pulls ss low, then transfers a command to the sensor. the host then releases ss to float high. drdy is unaffected in this step. 2) for 2-byte functions, (1) is repeated with a m 50s delay. 3) when the sensor has the command echo or requested data ready to send back to the host, it loads it into its spi register and pulls drdy low. 4) the host detects that the sensor has pulled drdy low and in turn the host pulls ss low. 5) the host obtains the byte from the sensor by transmitting a dummy byte (0x00) to the sensor. 6) the sensor releases drdy to float high. 7) after the host detects that drdy' has floated high the host must allow ss to also float high. 8) for multi-byte responses, steps (3) through (7) are repeated until the return data is completely sent. the host must release the ss line in step (7) even between multiple byte responses because the qt60xx5 waits for the ss line to return high before signalling that the next byte is ready for collection. the host should check the drdy line and wait for it to go high before transmitting another byte. until the drdy line is released the sensor is still processing a data return, even if the complete response data has been fully transferred; the sensor may still be busy when the host finishes the byte transfer and may not be able to digest a new command immediately. see section 3.18, page 15, for a description of the alert pin which can be used to reduce communication traffic. 4.4 spi master-slave mode refer to figures 4-1 and 4-3. in master-slave mode the host and sensor take turns being master; the host always initiates in master mode during an exchange. the current master always controls all 3 signals. the sensor takes a variable amount of time to respond to the host, depending on the function and current and pending tasks. spi master/slave mode is selected by tying pin 37 (ms) low via a 10k resistor. pin 37 is also an oscilloscope sync output (see section 3.20 and command ^r, page 29) and should never be tied directly to either supply rail. the host, like the sensor, must idle in slave mode when not sending a command. master/slave requires 3 signals to operate: mosi - master out / slave in data pin - bidirectional - an input pin while the host is transmitting data; an output when the sensor is transmitting data. the mosi of the host and slave should be tied together. the miso lines are not used on either part and should be left open. sck - spi clock - bidirectional - an input pin when receiving data; an output pin when sending. the host must shift out data on the falling edge of sck; the qt60xx5 clocks data in on the rising edge of sck. important note: sck from the host must be low before asserting ss low or high at either end of a byte or the transmission will fail. sck should idle low; if in doubt, a 10k pulldown resistor should be used. when the sensor returns data it becomes the master; data is shifted out by it on the falling edge of sck and should be clocked in by the host on the rising edge. ss - slave select - bidirectional framing control. when the sensor is in slave mode, this pin accepts the ss control signal from the host. in either data direction, ss' must go low before and any during data transfer; it should not go high again until sck has returned low at the end of a byte. ? quantum research group ltd. l q 18 www.qprox.com qt60xx5 / r1.05 figure 4-4 filtering spi slave-only connections figure 4-5 filtering spi master-slave connections mosi miso sck drdy ss qt60xx5 circuit ra 220 47pf ra ra ra ra reset 1k host mcu 100 22pf yn xn x drives (1 of 8 shown) y lines (1 of 8 shown) 10k +5 ca ca ca ca ca 1nf 10k +5 sck miso mosi (ms not shown) p_in p_out1 p_out2 mosi miso sck drdy ss qt60xx5 circuit 220 47pf ra ra ra reset 1k host mcu 100 22pf yn xn x drives (1 of 8 shown) y lines (1 of 8 shown) ca ca ca ca 1nf 10k +5 mosi ca ca ss sck miso (ms not shown) p_out 1nf 2,200 46.875khz 470pf 2,200 93.75khz 270pf 1,000 375khz 100pf 680 1.5mhz ca ra spi clock rate recommended values of ra & ca for figures 4-4 and 4-5
in master mode the sensor asserts control over this line, to make the host a slave and to frame the data. this line must idle high; the part includes an internal pullup resistor and should be floated during idle times. internal pullup resistor note: the internal pullup resistor on ss can range from 35k to 120k ohms. if rc filtering is used on the spi lines per figure 4-5, this pullup resistance may not be low enough to ensure adequate signal risetime and may need to be augmented with external 10k pullups. a command may consist of one or two bytes with a m 50s delay between bytes. at the end of a full command, the host must go into slave mode to await a response. the sensor may take some time to process the command and respond. when it does, it asserts ss low and begins clocking data out. for multi-byte responses, bytes will be sent at intervals which may be irregular depending on the request and the processing load of the sensor. the host must be prepared to accept the sensor data as it comes or there can be a data overrun in the host. if the data returns too quickly for the host to accept it, lower the spi clock rate . a typical master-slave function sequence is as follows: 1) host enters master mode. the sensor is already in slave mode. 2) the host pulls ss low, then transfers one byte of command to the sensor via mosi, then releases ss to float high again. 3) for 2-byte functions, (2) is repeated with m 50s spacings between bytes. 4) the host immediately places its spi port into slave mode, floating sck and mosi ; ss stays floating. 5) when the sensor has a command echo or data to send back, it puts its spi register in master mode, taking control over mosi and sck. ss' remains floating. 6) the sensor pulls ss low, then clocks out its response byte to the host, then floats ss high again. 7) the sensor repeats (6) as necessary for multiple byte responses. 8) the sensor returns to slave mode. after the transmission sequence, the spi lines float high or are left to float in an indeterminate state (mosi) until the next transmission sequence is initiated by the host. the host should wait for m 1ms after a sequence before initiating another transmission sequence. see section 3.18, page 15, for a description of the alert pin which can be used to reduce communication traffic. 4.5 sensor echo and data response the devices respond to each and every valid command from the host with at least one return byte. in the case of functions that do not send data back to the host, the part returns the command itself as an echo, but only after the function has been completed; this also holds for 2-byte functions where the second byte is an operand: in these cases the return byte is an echo of the command, not the operand. exception: the recalibration command b returns an acknowledgement immediately rather than just before the actual recalibration. commands that return data do not send back a command echo. if desired, the command can be verified via the 'l' (lowercase l) echo function; see page 28. the host should not transmit a new command until the last command has been processed and responded to completion, plus 1ms. commands that are not recognized are ignored, and the host should monitor for timeouts to detect these conditions. if this occurs a new command should not be sent until the specified timeout duration has expired. the maximum timings shown in table 4-1 and section 7-5 are guaranteed provided that the part is operating within the timing limitations of section 5.7. if burst timing is in violation, the response time to a command may be longer. 4.6 eeprom corruption the device stores its setup data in an internal eeprom which can be readily altered via put mode commands. sometimes noise on vdd, the spi lines or reset pin can cause eeprom corruption which can be difficult or inconvenient to correct. the device should always be left in get mode to prevent spurious commands from corrupting the eeprom. the get command should ideally be repeated every second or so to ensure that if noise on the spi lines causes a false put mode command that it does not last long. preferably, the l command (lowercase l ) should be used to verify that the put command has succeeded. flash backup: the part backs up the entire eeprom array into onboard flash rom after one or more setup write commands have been issued and the part is then reset. during normal operation the part constantly compares the flash area with the eeprom array to ensure the two sections match. if an eeprom error is detected, the device sets an error flag (bit 4) in the general device status byte (command 7 , page 22) which can be read by the host device. the led output also becomes active. if the bit 4 error flag is set, the host should immediately induce a device reset. bit 4 is also set if an intentional write has been made to eeprom, but not yet copied into flash via the reset process. it is perfectly acceptable to continue altering any number of setup parameters prior to doing the reset, ignoring this bit. during power up or after a reset, the device compares the flash area with eeprom, and if there is a discrepancy the eeprom is refreshed from flash, unless an intentional write was detected in which case the flash is updated from the eeprom. as intentional writes in put mode should only occur during manufacture, it is normally safe to assume that eeprom changes during normal run mode are errors. the host can also periodically test the checksum of the eeprom as a backup mechanism to the bit 4 error flag. the uppercase l command, lock reference levels, also writes data to eeprom, and this data also has the potential to become corrupted. this data is also backed up in flash so that it can be recovered, and an error in this data will also set bit 4 and also alter the checksum. also, the l command only operates if the device is in put mode as a further protection. flash rom has a limit of 1,000 write cycles, so copy-to-flash should not be used routinely. ? quantum research group ltd. l q 19 www.qprox.com qt60xx5 / r1.05
5 commands & functions the command structure is designed to minimize control and data traffic. all repetitive data and status commands from the host are single-byte, and most commands result in single- byte device responses. behavioral setup commands involve multiple bytes but these are infrequently used. special 'scope' commands exist to restrict subsequent commands to a specific key or range of keys. this control structure permits most matrix keys, which are usually identical in shape and size, to be programmed 'in bulk' using a 'global' scope command, followed by a scope restriction to specific key(s), followed by more key programming, to prevent the need for tedious key-by-key programming across an entire matrix. there are four types of commands: direction - determine whether subsequent commands are used to get data from or put data to the part; scope - restrict the range of effect of subsequent commands to a specific set of keys; status - cause the part to respond with key information, such as detections, signals, error codes, and the like; setup - modify functionality such as burst length, threshold levels, drift compensation characteristics, etc. supervisory - special functions such as diagnostics, calibration, etc. which affect the part as a whole. all command types can be intermixed. even during normal device operation it is possible to use setup and supervisory functions to alter key behavior on the fly. there is no special 'setup mode'. get/put, scope, and many supervisory functions are volatile and do not persist after a power down or reset cycle. some supervisory commands require that the part be reset in order for the new settings to take effect. note that the setup functions write to eeprom and require extra time for a response back to the host. also note that as with all eeprom memories there is a recommended lifetime limit to the number of writes; this limit is 100,000 cycles. command functions are summarized in section 5-6 it is highly advised to test the device checksum (command ?6?) or individual key settings or the general device status (?7?) once setups have been programmed into the part, each time the part is powered up and periodically while running. the part backs up all eeprom locations into flash memory, from which data is restored automatically following a reset if eeprom corruption is detected. the part should also be reset after any put command(s) in order to force the copy of eeprom data into flash. see section 4.6. 5.1 direction commands setup commands can be used to either send control information to the part for programming into its internal eeprom, or to extract the current setting of this information. the same setup function can do either. to accomplish this the device relies on direction control via the get and put commands. in get mode, a setup command will return information. in put mode, the behavior of the device is altered, and often a second operand byte must be sent. the powerup or reset default mode is get. the current get/put mode persists until countermanded by a different get/put command or until the device is reset or powered off. it is advisable to use put mode only when actually writing setups to the device, which will happen infrequently; the part should normally be left in get mode. get mode acts as a lock to prevent accidental changes to the internal eeprom. multiple direction commands of the same type (g, g, g, g ...) are harmless and can be used to insure that the part does not accidentally enter put mode for a prolonged period, for example due to noise glitches on the spi lines. the 'g' command can be repeated every few seconds. g 0 x 67 - g et c ommand n/a n/a n/a n/a get 0x67 n/a 1 n/a put return s 2nd b y te ran ge b y tes / cm d scop e lowercase 'g'. the 'g' command causes the device to treat all subsequent setup commands as 'gets'; after, when a setup command is received from the host the part will respond by sending back the current status of that setup parameter. the 'g' command is always single-byte and echoes back itself. p 0 x 70 - p ut c ommand n/a n/a n/a n/a get 0x70 n/a 1 n/a put returns 2nd byte range bytes / cmd scope lower case 'p'. the 'p' command causes the device to treat all subsequent setup commands as 'puts'; after, when a 2-byte setup command is received from the host the part will respond by programming in the desired parameter for the key(s) which are affected. the 'p' command is always single-byte and echoes back itself. ? quantum research group ltd. l q 20 www.qprox.com qt60xx5 / r1.05
5.2 scope commands the host should always set the scope parameter when initializing the part during normal operation as well as during setup. scope commands are persistent and apply to all subsequent functions that are affected by scope, until a different scope command is issued. on powerup or after reset the device defaults to scope = 'all keys'. many functions only address one key regardless of the current scope; in these cases the key being addressed is always the key last set by the 's' or 'x' and 'y' commands. if the 's' command was last set to key # 9 (x=1, y=1), then even though the 's' command was issued afterwards the one-key scope will remain key '9'. if 'x' were subsequently set to 2 then one-key scope will be key x=2, y=1 (key # 10). if 'y' were subsequently set to 3, then one-key scope will be key x=2 / y=3 (key # 26). this rule operates for commands in either put or get modes. key numbering convention: the numbering of keys goes by row then column. for example, the key in row x=3, column y=1 (x3y1) is key 11. the formula for conversion of an x-y location to a key number is: key _ number = x _ row + (y _ column x 8) row and column numbers are per fig. 1-6. keys are acquired in this same burst sequence, i.e. x0y0, x1y0, x2y0 etc. s 0 x 73 - s pecific k ey s cope n/a n/a n/a n/a get 0x73 0x00..0x3f 2 n/a put return s 2nd b y te ran ge b y tes / cm d scop e lowercase 's'. targets a specific individual key for all further functions that are affected by scope. the second byte must contain a binary key number from 0..63 decimal. s 0 x 53 - a ll k eys s cope n/a n/a n/a n/a get 0x53 n/a 1 n/a put return s 2nd b y te ran ge b y tes / cm d scop e uppercase 's'. addresses all keys in the matrix for all further functions that can target a group of keys. x 0 x 78 - r ow k eys s cope n/a n/a n/a n/a get 0x78 0x00..0x07 2 n/a put returns 2nd byte range bytes / cmd scope lowercase 'x'. targets keys in a specific row for functions that can address key groups. the second byte must contain a row number from 0..7. this command also affects scope for single-key commands. y 0 x 79 - c olumn k eys s cope n/a n/a n/a n/a get 0x79 0x00..0x07 2 n/a put return s 2nd b y te ran ge b y tes / cm d scop e lowercase 'y'. targets keys in a specific column for functions that can address key groups. the second byte is a binary column number from 0..7. this command also affects scope for single-key commands. 5.3 status commands status commands cause the sensor to report back information related to keys and their signals. it is not necessary to set the part to get mode with these commands, although it is advised to leave the part in get mode as a normal precaution (see section 5.1) 0 0 x 30 - s ignal for s ingle k ey 0x00..0xff 1 1 1 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e numeric '0'. returns the signal level in 8-bit unsigned binary for one key whose location is determined by scope. note that the signal level is inverted: decreasing values correspond to more touch due to the physics of key detection described in section 1.1. 1 0 x 31 - d elta s ignal for s ingle k ey 0x00..0xff 1 1 1 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e numeric '1'. returns the value { reference - signal } in unsigned 8-bit binary for one key whose location is determined by scope. if signal > reference, the result is truncated to zero. increasing amounts of this value correspond to increasing amounts of touch as the sign of signal is inverted (see 0x30 above). 2 0 x 32 - r eference v alue 0x00..0xff 1 1 1 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e numeric '2'. returns the reference value in unsigned 8-bit binary for one key whose location is determined by scope. 3 0 x 33 - r2r o ffset 0x00..0xff 1 1 1 get n/a n/a n/a n/a put returns # bytes rtnd bytes / cmd scope section 1.2, p. 4 numeric '3'. returns the r2r offset value in unsigned 8-bit binary for one key whose location is determined by scope. this function is useful primarily for circuit diagnostics or for an independent determination of proper circuit operation. 4 0 x 34 - c z s tate 0x00..0x02 1 1 1 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e section 1.2, p. 4 numeric '4'. returns the cz state for one key whose location is determined by scope. this function is useful primarily for circuit diagnostics or for an independent determination of circuit operation after calibration. a higher value indicates more cz cancellation is being applied to compensate for cx; a value of 2 indicates both cz caps are being switched in. ? quantum research group ltd. l q 21 www.qprox.com qt60xx5 / r1.05
5 0 x 35 - d etection i ntegrator c ounts 0x00..0xff 1 1 1 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e numeric '5'. returns the detection integrator counter value for one key whose location is determined by scope. this function is useful primarily for circuit diagnostics. 6 0 x 36 - e eprom c hecksum 0x00..0xff 1 1 n/a get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e numeric '6'. returns the entire eeprom checksum. this function is useful primarily for diagnostics and should periodically be used to check for valid eeprom contents. the checksum should be computed when the entire device's settings, including the locked reference levels ('l' command) are set. the host can then periodically test the checksum to validate eeprom integrity. if needed, the eeprom can then be reprogrammed by the host or the device can be reset to allow the eeprom to be updated from flash rom (see section 4.6). the checksum is a simple 8-bit carry fold-back type. changes to multiple setups can generate identical checksums. changes to one location only will always produce a different checksum. an identical change to 2, 4, 8, 16, 32 or 64 keys is more prone to generating an identical checksum. a unique checksum can be obtained again by altering any setup for another key (i.e. an unused key) to be different. after any setups change, the checksum will not be valid until after the device has been reset. note that the general status byte returned by the 7 command contains a bit that is set if there is an error in eeprom data; this feature operates independently of the checksum command. there is no put version of the command. 7 0 x 37 - g eneral d evice s tatus 0x00..0x1f 1 1 n/a get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e section 2.12, p. 8 numeric '7'. returns the part's general status byte which is a 5-bit pattern as follows: kd kr ke sf ef u u u b0 b1 b2 b3 b4 b5 b6 b7 kd: 1= one or more keys are in detection kr: 1= one or more keys are recalibrating ke: 1= one or more keys are reporting errors sf: 1= sync fail; the part is not synchronized to an external source (if in that mode; see section 3.17). ef: 1 = eeprom / flash discrepancy (section 4.6) higher bits ( u ) report as 0's and are not used. this command can be used as a general 1-byte status response; if one or more bits are set, the host can take interrogate further to narrow down specifics, such as which key is being touched or in error, via other commands. < sp > 0 x 20 - s ignal l evels for g roup 0x00..0xff 8 or 64 1 8, 64 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e space character. same function as 0x30 above except returns a group response of 8 bytes (if scope = row or column selected) or 64 bytes (if scope = entire matrix selected). if no group scope has been selected, returns data for all keys (64 bytes). ! 0 x 21 - d elta s ignals for g roup 0x00..0xff 8 or 64 1 8, 64 get n/a n/a n/a n/a put returns # bytes rtnd bytes / cmd scope exclamation character. same function as 0x31 above except returns a group response for 8 or 64 keys depending on current scope. if no group scope has been selected, returns data for all keys (64 bytes). " 0 x 22 - r eference l evels for g roup 0x00..0xff 8 or 64 1 8, 64 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e double quote character. same function as 0x32 above except returns a group response of 8 or 64 bytes depending on current scope. if no group scope has been selected, returns 64 bytes. # 0 x 23 - r2r o ffset for g roup 0x00..0xff 8 or 64 1 8, 64 get n/a n/a n/a n/a put returns # bytes rtnd bytes / cmd scope hash character. same function as 0x33 above except returns a group response of 8 bytes (scope = row or column selected) or 64 bytes (scope = entire matrix selected) depending on the current group scope setting. if no group scope has been selected, returns 64 bytes. $ 0 x 24 - c harge c ancellation for g roup 0x00..0x03 8 or 64 1 8, 64 get n/a n/a n/a n/a put returns # bytes rtnd bytes / cmd scope dollar character. same function as 0x34 above except returns a group response of 8 bytes (scope = row or column selected) or 64 bytes (scope = entire matrix selected) depending on the current group scope setting. if no group scope has been selected, returns 64 bytes. % 0 x 25 - d etect i ntegrator c ounts for g roup 0x00..0xff 8 or 64 1 8, 64 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e percent character. same function as 0x35 above except returns a group response of 8 bytes (scope = row or column) or 64 bytes (scope = entire matrix) depending on the current group scope setting. if no group scope has been selected, returns 64 bytes. ? quantum research group ltd. l q 22 www.qprox.com qt60xx5 / r1.05
e 0 x 65 - e rror c ode for s elected k ey 0x00..0x0f 1 1 1 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e section 2.12, p. 8 lowercase 'e'. returns the error byte for a selected key defined by the 's' command. a 4-bit pattern is returned: f r h l u u u u b0 b1 b2 b3 b4 b5 b6 b7 f: 1= failed last full recalibration attempt r: 1= key is in process of full recalibration h: 1= key reference is high (above normal bounds) l: 1= key reference is low (below normal bounds) u: undefined refer also to section 2.10. f, bit 0 is set if it failed to calibrate properly during a forced recalibration. the sensor will automatically make 5 sequential attempts at recalibration before setting this flag. r, bit 1 is set if the key is in the process of a full recalibration. when set, bits 2 and 3 are immediately cleared. h, bit 2 when set indicates either: - the reference has drifted above decimal 191, or, - the total absolute reference level has become higher than the upper window boundary described in section 2.11 and as defined by command ^n after a forced recalibration. l, bit 3 when set indicates either: - the reference has drifted below decimal 64, or, - the total absolute reference level has become lower than the lower boundary described in section 2.11, as defined by command ^o after a forced recalibration. bits 2 and 3, if set via drift compensation, would indicate that the key should be recalibrated by the host. if h and l bits appear immediately after a full recalibration, it means that the key is probably defective. e 0x45 - error codes for group 0x00..0xff 1 or 8 1 1, 8, 64 get n/a n/a n/a n/a put returns # bytes rtnd bytes / cmd scope section 2.12, p. 8 uppercase 'e'. returns general error codes for a range of keys defined by scope. returns either 1 or 8 bytes depending on whether a single key, row, column, or entire matrix are selected. the bitfields for a single key are the same as for 'e' above. the bitfields for a single row (x) are: y 0 y1 y2 y 3 y4 y5 y6 y7 b0 b1 b2 b3 b 4 b 5 b6 b7 the bitfields for a single column (y) are: x0 x1 x2 x3 x4 x5 x6 x7 b0 b1 b2 b3 b4 b5 b6 b7 the bitfields for a global response are: x0 y 7 56 x1y7 57 x2y7 58 x3y7 59 x4y7 60 x5y7 61 x6y7 62 x7y7 63 b y te8 x0 y 6 48 x1y6 49 x2y6 50 x3y6 51 x4y6 52 x5y6 53 x6y6 54 x7y6 55 b y te7 x0y5 40 x1y5 41 x2y5 42 x3y5 43 x4y5 44 x5y5 45 x6y5 46 x7y5 47 byte6 x0y4 32 x1y4 33 x2y4 34 x3y4 35 x4y4 36 x5y4 37 x6y4 38 x7y4 39 byte5 x0y3 24 x1y3 25 x2y3 26 x3y3 27 x4y3 28 x5y3 29 x6y3 30 x7y3 31 byte4 x0y2 16 x1y2 17 x2y2 18 x3y2 19 x4y2 20 x5y2 21 x6y2 22 x7y2 23 b y te3 x0y1 8 x1y1 9 x2y1 10 x3y1 11 x4y1 12 x5y1 13 x6y1 14 x7y1 15 b y te2 x0y0 0 x1y0 1 x2y0 2 x3y0 3 x4y0 4 x5y0 5 x6y0 6 x7y0 7 b y te1 b0 b1 b2 b3 b4 b5 b6 b7 byte 1 is the first returned byte in the sequence. in all the above examples a '1' in a bit position indicates that there is some type of error associated with the key. the use of the 'e' command (or 'e' with scope set to a specific key) will specify the nature of the error. k 0 x 6b - r eporting of f irst t ouched k ey 0x00..0xff 1 1 n/a get n/a n/a n/a n/a put returns #bytes rtnd bytes / cmd scope section 2.12, p. 8 lowercase 'k'. returns a byte that indicates which if any key has been touched. the byte is structured as follows: k0 k1 k2 k3 k4 k5 - m b0 b1 b2 b3 b4 b5 b6 b7 bits are used as follows: m - if '1', indicates that yet another key is active k0..k5 - indicates the key number of a first detected key, in the range 0..63 (0x00..0x3f). if a reported key drops out while other keys are active, 'k' will report one of the other active keys, but there is no rule for which of the next keys gets reported in k0..k5. if the byte returned has a value of 255 (0xff), then no key has been detected. ? quantum research group ltd. l q 23 www.qprox.com qt60xx5 / r1.05
k 0 x 4b - k ey t ouch r eporting for g roup 0x00..0xff 1 or 8 1 1, 8, 64 get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e section 2.12, p. 8 uppercase 'k'. returns 1 or 8 bytes depending on the current scope. the byte(s) returned contain a bit pattern which indicates touched keys. a scope of a single key, row or column will return one byte. a scope of all keys will return 8 bytes. if scope is one key, only the lsb is used to report. the bitfields for a single key are: key - - - - - - - b0 b1 b2 b3 b4 b5 b6 b7 the bitfields for a single row (scope is x) are: y 0 y1 y2 y 3 y4 y5 y6 y7 b0 b1 b2 b3 b 4 b 5 b6 b7 the bitfields for a single column (scope is y) are: x0 x1 x2 x3 x4 x5 x6 x7 b0 b1 b2 b3 b4 b5 b6 b7 the bitfields for a global report are: x0 y 7 56 x1y7 57 x2y7 58 x3y7 59 x4y7 60 x5y7 61 x6y7 62 x7y7 63 b y te8 x0 y 6 48 x1y6 49 x2y6 50 x3y6 51 x4y6 52 x5y6 53 x6y6 54 x7y6 55 b y te7 x0y5 40 x1y5 41 x2y5 42 x3y5 43 x4y5 44 x5y5 45 x6y5 46 x7y5 47 b y te6 x0y4 32 x1y4 33 x2y4 34 x3y4 35 x4y4 36 x5y4 37 x6y4 38 x7y4 39 byte5 x0y3 24 x1y3 25 x2y3 26 x3y3 27 x4y3 28 x5y3 29 x6y3 30 x7y3 31 byte4 x0y2 16 x1y2 17 x2y2 18 x3y2 19 x4y2 20 x5y2 21 x6y2 22 x7y2 23 byte3 x0y1 8 x1y1 9 x2y1 10 x3y1 11 x4y1 12 x5y1 13 x6y1 14 x7y1 15 b y te2 x0y0 0 x1y0 1 x2y0 2 x3y0 3 x4y0 4 x5y0 5 x6y0 6 x7y0 7 b y te1 b0 b1 b2 b3 b 4 b 5 b6 b7 byte 1 is the first returned byte in the sequence. in all the above examples a '1' in a bit position indicates that the key is touched; a '0' indicates no touch. 5.4 setup commands setup functions are those that alter the behavior a key or a group of keys. the setups are programmed into eeprom locations in the part and ordinarily do not need to be reprogrammed once set. however it is possible to change a setup while the device is in normal operation without interrupting the sensing function of the part. setup functions alter the internal eeprom, and this requires a much longer time to complete than other commands; see table 4-1. setup 'put' commands become effective immediately after the echo response of the command byte unless otherwise noted; some setups require that the key(s) being altered be recalibrated with the 'b' command before they take effect. ^a 0 x 01 - n egative d etect t hreshold 0x04..0x40 n/a 1 1 get 0x01 0x04..0x40 2 1, 8, 64 put returns byte 2 range bytes / cmd scope section 2.1, p. 5 ctrl-a. in put mode, the command followed by a setting is programmed into eeprom for the key(s) affected by scope. 1, 8, or 64 keys may be affected. valid decimal values are: 45678101215 17 20 25 30 35 45 55 64 values other than the above will be rounded down. in get mode, the command will return a single byte according to the rules of section 5.2, page 21. this setup controls key sensitivity by setting the counts of signal delta needed to cause a detect. higher = less sensitive. numbers should be 6 or greater under most conditions to reduce the probability of noise detection. numbers greater than 20 indicate that the burst length is probably too high. this setup interacts with burst length (^f). ^b 0 x 02 - p ositive d etect t hreshold 0x04..0x40 n/a 1 1 get 0x02 0x04..0x40 2 1, 8, 64 put returns byte 2 range bytes / cmd scope section 2.2, p. 6 ctrl-b. in put mode, the command followed by a setting is programmed into eeprom for the key(s) affected by scope. 1, 8, or 64 keys may be affected. valid decimal values are: 45678101215 17 20 25 30 35 45 55 64 values other than the above will be rounded down. in get mode, the command will return a single byte according to the rules of section 5.2, page 21. this setup controls the ability of a key to recalibrate quickly should the signal transition positive quickly, as when a touch is prolonged enough to cause a recalibration, and when the key is then 'untouched'. this condition can also be caused by a foreign object being removed from a key. the value should normally be set between 6 and 10 counts. if the value is very high, the key will still recover by means of the drift compensation process, albeit more slowly. ? quantum research group ltd. l q 24 www.qprox.com qt60xx5 / r1.05
^c 0 x 03 - n egative t hreshold h ysteresis 0x01..0x03 n/a 1 64 get 0x03 0x01..0x03 2 64 put return s b y te 2 ran ge b y tes / cm d scop e section 2.3, p. 6 ctrl-c. in put mode, the command followed by a setting is programmed into eeprom for all keys only. the value should be from 0 to 3, representing hysteresis as follows: 0: 50% 1: 25% 2: 12.5% 3: 0% (no hysteresis) values other than the above will be rounded down. the percentage is the distance from the threshold level to the reference level. the hysteresis level is always closer to the threshold point than to the reference point. 25% is a reasonable value under most conditions. as this parameter is common to all keys, put and get operations send or return only one byte. ^d 0 x 04 - p ositive t hreshold h ysteresis 0x01..0x03 n/a 1 64 get 0x04 0x01..0x03 2 64 put returns byte 2 range bytes / cmd scope section 2.3, p. 6 ctrl-d. identical in operation to ^c above except this applies to positive 'detections' used to recalibrate the sensor (see ^b above for details). uses same hysteresis values as ^c above. ^e 0 x 05 - d well t ime in m achine c ycles 0x01 n/a 1 64 get 0x05 0x01 2 64 put returns byte 2 range bytes / cmd scope sections 1.2, 3.3, 3.9, 3.13 ctrl-e. governs the delay from the rise of an x drive to the termination of y transfer gating ('dwell time'). this command is included for compatibility with future versions. the device defaults to 1 (one) machine cycle of dwell or 167ns with a 6mhz oscillator. although the command will be accepted, this setting cannot be changed. the dwell time can be shortened below 167ns by an external circuit as described in section 3.9. as this parameter is common to all keys, put and get operations send or return only one byte, 0x01. ^f 0 x 06 - b urst l ength 0x00..0x40 n/a 1 1 get 0x06 0x00..0x40 2 1, 8, 64 put return s b y te 2 ran ge b y tes / cm d scop e section 3.6, p. 12 ctrl-f. in put mode the command sets the burst length of one or more keys, according to the current scope. valid decimal values are: 012345710 12 15 20 25 30 40 50 64 values other than the above will be rounded down. in get mode, the command will return a single byte according to the rules of section 5.2, page 21. ^f sets the length of the acquisition burst on a key by key basis. this setting is directly proportional to signal gain. this setup interacts with negative and positive threshold (^a and ^b). increasing ^f can allow for higher threshold levels and more robust signals, at the expense of increased radiated emissions and reduced cx load capacity. special condition: if the value for ^f for a key is set to zero the burst disabled and the key will not function; the key will report back with an error code. the timing for the 'phantom burst' will be preserved so that overall key scan timing will remain unchanged. ^g 0 x 07 - b urst s pacing 0x00..0x05 n/a 1 64 get 0x07 0x00..0x05 2 64 put return s b y te 2 ran ge b y tes / cm d scop e section 3.8, p. 12 ctrl-g. in put mode, sets the spacing between successive acquire bursts for the entire matrix. the second byte indicates the spacing to be set according to the following values: 0: 250s 1: 300s 2: 400s 3: 500s 4: 1000s 5: 2000s values higher than the above will be truncated to 2000s. longer delay times equate to slower acquisitions. at lower delay times (faster rep rates) there can be conflicts with long burst lengths which will prevent proper operation; see section 5.7. the time required to scan the entire keymatrix once is the above delay multiplied by 64 regardless of the number of keys actually used or the part model number. burst spacing also affects recalibration time; see section 2.10 the scope for this function is always 'all keys'. ? quantum research group ltd. l q 25 www.qprox.com qt60xx5 / r1.05
^h 0 x 08 - n egative d rift c ompensation r ate 0x01..0x64 n/a 1 1 get 0x08 0x01..0x64 2 1, 8, 64 put return s b y te 2 ran ge b y tes / cm d scop e section 2.4, p. 6 ctrl-h. in put mode, sets the rate of drift compensation used in the negative signal direction. the second byte must be one of the following valid values (shown in decimal): 1234681012 15 20 25 33 45 60 75 100 values other than the above will be rounded down. these numbers correspond to the amount of drift compensation applied, in 100ms/count of reference change, for signals which are negative with respect to the reference level, i.e. in the same direction as legitimate detections. higher numbers equate to slower drift compensation. overcompensation (too fast) can result in the suppression of legitimate detections. under-compensation can result in inadequate compensation for rapid environmental changes. values of 15 to 45 (1.5 to 4.5 secs/count) are considered normal under most conditions. drift compensation does not occur while the signal has passed below the ^a threshold level or subsequently remained below the negative hysteresis level. in get mode, the command will return a single byte according to the rules of section 5.2, page 21. put mode scope can be one key, a row or column, or all keys. ^i 0 x 09 - p ositive d rift c ompensation r ate 0x01..0x64 n/a 1 1 get 0x09 0x01..0x64 2 1, 8, 64 put returns byte 2 range bytes / cmd scope section 2.4, p. 6 ctrl-i. same as ^h above in all respects, except operates only when the signal is positive with respect to the reference level, i.e. in an abnormal direction. it is usually desirable to set this rate much faster than for ^h, i.e. to a lower number. valid decimal values are: 1234681012 15 20 25 33 45 60 75 100 values other than the above will be rounded down. values of 4 to 10 (0.4 to 1.0 secs/count) are considered suitable for most systems. positive drift compensation continues to operate even if the signal has exceeded the positive threshold. ^j 0x0a - d etect i ntegrator l imit 0x00..0xff n/a 1 1 get 0x0a 0x00..0xff 2 1, 8, 64 put returns byte 2 range bytes / cmd scope section 2.6, p. 7 ctrl- j . in put mode, sets the detect integrator limit for one or more keys according to scope. the unit of measure is a burst, i.e. a setting of 5 means that a detection must be sensed 5 bursts in sequence. a burst for a key occurs once every complete matrix scan. thus, if the burst spacing is 500us, the response time will be: 5 x 500us x 64 = 160ms the second byte must be one of the following values (shown in decimal): 0123571015 20 32 45 60 90 123 175 255 values other than the above will be rounded down. in get mode, the command will return a single byte according to the rules of section 5.2, page 21. this setup can be used as a noise filter, or as a mechanism to intentionally slow down key reaction time in order to require a long user touch. special condition: if the value for ^ j is set to zero the key is disabled, but the burst for the key is still generated. ^k 0x0b - p ositive r ecalibration d elay 0x00..0xff n/a 1 1 get 0x0b 0x00..0xff 2 1, 8, 64 put returns byte 2 range bytes / cmd scope section 2.7, p. 7 ctrl-k. in put mode, sets the delay until recalibration, timed from when the signal first crosses the positive threshold. the second byte controls the delay in 100ms increments, and must be one of the following valid values: 0123571015 20 32 45 60 90 123 175 255 values other than the above will be rounded down. as an example, a value of 85 will cause a 6-second delay. in get mode, the command will return a single byte according to the rules of section 5.2, page 21. special condition: if ^k is set to zero this feature is disabled and the key will never auto-recalibrate on positive transitions; however drift compensation will still operate. ^l 0x0c - n egative r ecalibration d elay 0x00..0xff n/a 1 1 get 0x0c 0x00..0xff 2 1, 8, 64 put returns byte 2 range bytes / cmd scope section 2.5, p. 6 ctrl-l. in put mode, sets the delay until recalibration, timed from when the signal first crosses below the negative threshold as defined by ^a. the second byte represents the delay in 1s increments, and must be one of the following valid values: 0123571015 20 32 45 60 90 123 175 255 values other than the above will be rounded down. as an example, a setting of 85 will cause delays of 60 seconds. in get mode, the command will return a single byte according to the rules of section 5.2, page 21. ? quantum research group ltd. l q 26 www.qprox.com qt60xx5 / r1.05
special condition: if the value for ^l is set to zero this feature is disabled and the key will never auto-recalibrate after a prolonged touch. ^m 0x0d - i ntra -b urst p ulse s pacing 0x02..0x0a n/a 1 64 get 0x0d 0x02..0x0a 2 64 put return s b y te 2 ran ge b y tes / cm d scop e section 3.7, p. 12 ctrl-m. in put mode, sets the amount of time between individual pulses in a burst. the second byte must be in the range of 2 to 10 decimal; other values will be ignored. the setting applies to all keys. the value corresponds to the timing between pulses within a burst, in microseconds. for example, a setting of 5 will set the pulse spacing to 5 microseconds. in get mode the function returns the current value of ^m. intra-burst pulse spacing controls the fundamental frequency of the burst and can have a strong effect on radiated emissions from the matrix control panel. it can also have an effect on susceptibility to external emi if the external fields are close in periodicity to the burst spacing. ^n 0x0e - p ositive r eference e rror b and 0x00..0x64 n/a 1 64 get 0x0e 0x00..0x64 2 64 put returns byte 2 range bytes / cmd scope section 2.8, p. 7 ctrl-n. in put mode, sets the amount of tolerable positive deviation in the reference level for all keys, in percent, with regard to the 'locked' reference value for each key. the setup is global in nature and affects all keys equally. valid values are from 0 to 100 decimal; higher values will be truncated to 100. the percentage applied is 10x the decimal value, thus, a value of 100 equates to a 1,000% change (i.e. 10x the locked reference level). in get mode the function returns the current setting of ^n. this setup is used to define the limit of possible positive reference deviation with respect to a factory setting, which is used in turn to set an error flag for key(s) whose reference level rises above the designated error band. if for example this setting is set to 50, and the device is calibrated and reference levels are locked (see command 'l', lock reference levels) into the part by the oem, then in the future if the reference level of a key should rise 500% over its locked reference level then the key will report back an error flag via commands 'e' or 'e'. to obtain the error flag for a boundary condition, the key must be first recalibrated using the 'b' command. the host device should periodically check the reference levels for keys to make sure they do not rise above 191 or fall below 64 (see section 2.11); if this should happen the host should recalibrate the affected key(s). failure to do so will prevent the error band limits from operating. the error band can be used to detect circuit faults as well as extremes of temperature or moisture on the circuitry. typical values are from 2 to 4 (20% to 40%). special condition: if the value is set to zero, this feature is disabled. ^o 0x0f - n egative r eference e rror b and 0x00..0x63 n/a 1 64 get 0x0f 0x00..0x63 2 64 put return s b y te 2 ran ge b y tes / cm d scop e section 2.8, p. 7 ctrl-o. in put mode, sets the amount of tolerable negative deviation in the reference level for all keys, in percent with regard to the 'locked' reference value for each key. the setup is global in nature and affects all keys equally. valid values are from 0 to 99 decimal; higher values will be truncated to 99. the percentage applied is equal to the decimal value; a value of 99 equates to 99% of the signal level (i.e. a 1% decrease w.r.t. the locked reference level). in get mode the function returns the current setting of ^m. this setup is identical in nature to ^n except that: (1) it governs negative reference deviations, and (2) values are expressed in percent instead of 10's of percent. special condition: if the value is set to 0, this feature is disabled. ^p 0x10 - a djacent k ey s uppression (?aks?) 0x00, 0x01 n/a 1 1 get 0x10 0x00, 0x01 2 1, 8, 64 put returns byte 2 range bytes / cmd scope section 2.9, p. 8 ctrl-p. in put mode, instructs logic for the keys specified by the current scope whether or not to enable the aks feature. valid 2nd byte values for this function are: 0: aks off { default } 1: aks on in get mode, the command will return a single byte according to the rules of section 5.2, page 21. aks functions to suppress detections from water films which can 'spread' a touch signal from the touched key to adjacent keys. it is also useful for panels with tightly spaced keys, where a fingertip can partially overlap an adjacent key. this feature will act to suppress the signals from the unintended keys. aks only operates across keys that have been aks-enabled; signal strength comparisons are not made with non- aks-enabled keys. unused keys with burst lengths of zero are also ignored for purposes of aks. ? quantum research group ltd. l q 27 www.qprox.com qt60xx5 / r1.05
5.5 supervisory / system functions supervisory functions report or control miscellaneous functions that affect overall chip control, testing, or diagnostics. all supervisory functions ignore scope except where noted. for commands requiring put mode to operate, the device should be set back to get mode immediately thereafter where possible, to help prevent unintended writes to eeprom. 6 0 x 36 - e eprom c hecksum 0x00..0xff 1 1 n/a get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e see page 22. d 0 x 44 - dac t est n/a n/a n/a n/a get 0x44 0x00..0xff 2 n/a put return s 2nd b y te ran ge b y tes / cm d scop e uppercase 'd'. enables the dac test mode function. the second byte contains the value to be sent to the dac, which must be sent within 100ms to the part otherwise the command is automatically cancelled. the part must be in put mode for this command to work. this function can be used to test the external r2r dac for proper operation during board production or in development. once in this mode the part ceases to operate as a sensor, and must be reset via power-down or the reset pin to restore normal operation. this function does not persist past reset or power-down. before the dac value is set in hardware, the burst length on all keys is set to 0 to disable keys and prevent further scanning. all keys will then report errors until all burst lengths are again set by the host after the part has been reset. a series of 'd' commands can be sent to cause the dac to generate a ramp or other test pattern which can be easily diagnosed on an oscilloscope. there is no get version of the command. l 0x4c - l ock r eference l evels n/a n/a n/a n/a get 0x4c 0x00 2 64 put returns 2nd byte range bytes / cmd scope section 2.8, p. 7 uppercase 'l'. this is a put-only command that locks the reference levels of the device into eeprom for all keys, for boundary checking purposes over the product's life. the whole command C 'l' followed by a null (0x00) - must be received within 100ms without any intervening byte, or the command will fail. the part must be in put mode for this command to work. the scope of this command is always 'all keys'. this function records to eeprom the cz values, dac offset, and signal reference. the locked reference levels are used to compute boundary checks; these are performed after the next device recalibration or reset. due to the large number of bytes written to eeprom by this command, there is a significant delay from the second byte until the return echo is sent back to the host. this command should be used only during production. there is no get version of the command. b 0x62 - r ecalibrate k eys n/a n/a n/a n/a get 0x62 n/a 1 1, 8, 64 put returns 2nd byte range bytes / cmd scope section 2.10, p. 8; section 3.16 lowercase 'b'. this is a put-only command that causes the keys selected by scope to recalibrate. the part must be in put mode for this command to work. the return byte is sent before the keys have calibrated. while keys are in recalibration, status of the keys can be determined using the 'e' or 'e' commands. if 'b' is sent while key(s) are already in the middle of recalibration, the affected key(s) will abandon the old calibration cycle and start a new one. there is no get version of the command. l 0x6c - r eturn l ast c ommand c haracter 0x00..0xff 1 1 n/a get n/a n/a n/a n/a put returns # bytes rtnd bytes / cmd scope lowercase 'l'. this get-only command reports back with the value of the prior command received by the part. the command also reports back any erroneous commands, allowing the host device to verify that a command was correctly received. if this command is repeated, the second and subsequent instances of 'l' will report back with 0x6c. there is no put version of the command. r 0x72 - r eset d evice n/a n/a n/a n/a get 0x72 0x00 2 n/a put return s 2nd b y te ran ge b y tes / cm d scop e section 3.14, p. 14 lowercase 'r'. this put-only command hard-resets the part. the command 0x72 must be followed by a null (0x00) within 100ms or the command will fail. the part must be in put mode for this command to work. after the null byte is received, the device will echo back the r character; about 16ms after the echo the part will reset. upon waking up again, the part will resume communication and sensing in accordance with the timing shown in section 3.16. if for some reason the device is unable to echo back the r character, for example due to the host not releasing the ss line, the part will completely reset anyway after about 2 seconds. there is no get version of the command. ? quantum research group ltd. l q 28 www.qprox.com qt60xx5 / r1.05
v 0x56 - r eturn p art v ersion 0x00..0xff 1 1 n/a get n/a n/a n/a n/a put return s # b y tes rtn d b y tes / cm d scop e uppercase 'v'. this get-only command returns the part version number. there is no put version of the command. w 0x57 - r eturn p art s ignature 0x20, 0x30, 0x40 1 1 n/a get n/a n/a n/a n/a put returns # bytes rtnd bytes / cmd scope section 3.1, p. 9 uppercase 'w'. this get-only command returns the part signature as follows: 0x20 (32 decimal) - for qt60325 0x30 (48 decimal) - for qt60485 0x40 (64 decimal) - for qt60645 there is no put version of this command. z 0x5a - e nter s leep n/a n/a n/a n/a get *0x5a, 0x5a 0x00 2 n/a put returns 2nd byte range bytes / cmd scope section 3.17, p. 14 uppercase ' z '. this put-only command forces the device to enter sleep mode. the command 0x5a must be followed only by a null (0x00) within 100ms or the command will fail. the command returns 0x5a immediately before going to sleep, and a second 0x5a upon waking up. the part must be in put mode for this command to work. if for some reason the device is unable to echo back the first z character, for example due to the host not releasing the ss line, the part will completely reset after about 2 seconds. the part will reawaken after a logic low is detected for >10s on pin 11 (x2ws pin, see section 3.17, p. 14). the device then sends the second z back to the host, and resumes from its prior state before it went to sleep without the need for recalibration. the device always reawakens in get mode. there is no get version of the z command. ^q 0x11 - d ata r ate s election 0x00..0x03 n/a 1 n/a get 0x11 0x00..0x03 2 n/a put return s 2nd b y te ran ge b y tes / cm d scop e section 4, p. 16 ctrl-q. this command sets the communications clock rate of the spi interface in master mode. the acceptable values of the 2nd byte are: 0: 46.875 khz { factory default } 1: 93.75 khz 2: 375 khz 3: 1.5 mhz the part must be in put mode for this command to work. note that when the part is in slave mode, the host can clock data to the device at rates up to 1.5mhz even if the setting of ^q is slower. new settings do not become effective until the device has been powered off and back on again or after the reset ( ? r ? ) command. refer to sections 4.3 and 4.4 for specific timing details. ^r 0 x 12 - o scilloscope s ync 0x00, 0x01 n/a 1 1, 8, 64 get 0x12 0x00, 0x01 2 1, 8, 64 put return s 2nd b y te ran ge b y tes / cm d scop e section 3.20, p. 15 ctrl-r. in put mode, controls the oscilloscope sync function of pin 37. the settings of this function are: 0: off { factory default } 1: on when on, pin 37 outputs a pulse that brackets the acquire burst(s) for the keys targeted by scope. without this it is virtually impossible to view signals corresponding to a specific key. pin 37 idles low and pulses high during a sync pulse. pin 37 is also used for spi mode selection by connecting to +5 or ground, and as a result if ^r is used, pin 37 should never be clamped to a supply rail but rather connected via a 10k resistor to prevent a short circuit. see section 3.20. ^r is volatile, that is, it does not persist after a power down. ^s 0x13 - c s c lamp p olarity 0x00, 0x01 n/a 1 - get 0x13 0x00, 0x01 2 - put returns 2nd byte range bytes / cmd scope section 3.19, p. 15 ctrl-s. controls the polarity of the cs clamp line, csr, pin 35, using the 2nd byte as follows: 0: active-low 1: active-high the part must be in put mode for this command to work. this pin controls the polarity of the reset signal applied to the charge integrator reset switch. in systems using an n-channel switch (active-high required to reset the cs capacitor), this option should be set to 1 ; for a p-channel mosfet switch in bipolar supply systems requiring an active-low to reset the cs capacitor, ^s should be set to 0 . for the reference circuit of figure 3-1 this should be set to 0 (the default); for the circuit of figure 3-2 this should be set to 1 .. the setting of ^s does not become effective until the device has been powered off and back on again or after the reset ( ? r ? ) command has been issued. ? quantum research group ltd. l q 29 www.qprox.com qt60xx5 / r1.05
^t 0x14 - b oundary e qn c onstant c1, msb 0x00..0x7f n/a 1 64 get 0x14 0x00..0x7f 2 64 put return s b y te 2 ran ge b y tes / cm d scop e section 2.8, p. 7 ctrl-t. in put mode, sets the msb of equation constant c1 for boundary checking purposes. the part must be in put mode for this command to work. the function has global scope. the default value is 5, which corresponds to the reference circuit on page 10. a change in this parameter only has effect after a reset or recalibration of all keys. valid values are from 0 to 127 decimal. each count of the msb has a value 256x that of the lsb. in get mode this function returns the current ^t value. refer to ^u (0x15) for the lsb definition. ^u 0x15 - b oundary e qn c onstant c1, lsb 0x00..0xff n/a 1 64 get 0x15 0x00..0xff 2 64 put returns byte 2 range bytes / cmd scope section 2.8, p. 7 ctrl-u. in put mode, sets the lsb of equation constant c1 for boundary checking purposes. the part must be in put mode for this command to work. the function has global scope. the default value is 0xe9, which corresponds to the reference circuit on page 10. a change in this parameter only has effect after a reset or recalibration of all keys. valid values are from 0 to 255 decimal. the value of the lsb must be combined with the value of the msb to form the total value. in get mode this function returns the current ^u value. refer to ^t (0x14) for the msb definition. ^v 0x16 - b oundary e quation c onstant c2 0x00..0xff n/a 1 64 get 0x16 0x00..0xff 2 64 put returns byte 2 range bytes / cmd scope section 2.8, p. 7 ctrl-v. in put mode, sets equation constant c2 for boundary checking purposes. the part must be in put mode for this command to work. this function has global scope. the default value is 8, which corresponds to the reference circuit on page 10. a change in this parameter only has effect after a reset or recalibration of all keys. valid values are from 0 to 255 decimal. in get mode this function returns the current ^v value. ^w 0x17 - n oise s ync 0x00, 0x01 n/a 1 - get 0x17 0x00, 0x01 2 - put return s b y te 2 ran ge b y tes / cm d scop e section 3.17, p. 14 ctrl-w. in put mode, sets whether the noise sync feature is enabled or disabled. the part must be in put mode for this command to work. the settings are: 0: off { factory default } 1: on this function has global scope. the default value is 0 (off). this feature can be used to synchronize the part to an external repetitive source of e-field which might interfere with the sensor signals, for example 50 or 60hz fields from adjacent power wiring. by doing so the part becomes immune to the noise source. in get mode this function returns the current setting of ^w. the setting of ^w does not become effective until the device has been powered off and back on again or after the reset ( ? r ? ) command has been issued. ? quantum research group ltd. l q 30 www.qprox.com qt60xx5 / r1.05
5.6 function summary table 24 - 0x00..0xff 1, 8, 64 1, 8, 64 g get indication of all touched keys report touches for group 0x4b k 23 - 0x00..0xff - - g get indication of first touched key report 1st key 0x6b k 23 - 0x00..0xff 1, 8, 64 1, 8, 64 g get error bits for group error codes for group 0x45 e 23 - 0x00..0x0f 1 1 g get error code for 1 key error code for 1 key 0x65 e 22 - 0x00..0xff 8, 64 8, 64 g get detection integrators for group det integrator for group 0x25 % 22 - 0x00..0x02 8, 64 8, 64 g get cz states for group cz states for group 0x24 $ 22 - 0x00..0xff 8, 64 8, 64 g get r2r offsets for group r2r offset for group 0x23 # 22 - 0x00..0xff 8, 64 8, 64 g get references levels for group references for group 0x22 ? 22 - 0x00..0xff 8, 64 8, 64 g get reference-signal for group delta signals for group 0x21 ! 22 - 0x00..0xff 8, 64 8, 64 g get signal for group signals for group 0x20 22 - 0x00..0x1f 1 - g get device status of entire device general device status 0x37 7 22 - 0x00..0xff 1 - g get eeprom checksum of entire eeprom eeprom checksum 0x36 6 22 - 0x00..0xff 1 1 g get detect integrator for 1 key det integrator for 1 key 0x35 5 21 - 0x00..0x02 1 1 g get cz value for 1 key cz state for 1 key 0x34 4 21 - 0x00..0xff 1 1 g get r2r offset for 1 key r2r offset for 1 key 0x33 3 21 - 0x00..0xff 1 1 g get reference level for 1 key reference for 1 key 0x32 2 21 - 0x00..0xff 1 1 g get reference-signal for 1 key delta signal for 1 key 0x31 1 21 - 0x00..0xff 1 1 g get signal for 1 key signal for 1 key 0x30 0 status commands 21 undefined 0x79 0x00..0x07 2 - p targets keys in a designated column, range 0..7 set column keys scope 0x79 y 21 undefined 0x78 0x00..0x07 2 - p targets keys in a designated row, range 0..7 set row keys scope 0x78 x 21 undefined 0x53 1 - p targets all keys in the matrix set all keys scope 0x53 s 21 undefined 0x73 0x00..0x3f 2 - p targets a specific key in range 0..63 set one key scope 0x73 s scope commands 20 get 0x70 1 - p all subsequent setups become 'puts? put 0x70 p 20 get 0x67 1 - p all subsequent setups become 'gets' get 0x67 g direction commands return range bytes returned scope returns operand range bytes/put scope page default setting get mode put mode p/g description name hex char ? quantum research group ltd. l q 31 www.qprox.com qt60xx5 / r1.05
27 0 (off) 0x00, 0x01 1 1 0x10 0x00, 0x01 2 1, 8, 64 p/g adjacent key suppression feature; 1 = on key suppression 0x10 ^p 27 0 (off) 0x00..0x63 1 64 0x0f 0x00..0x63 2 64 p/g tolerable negative reference deviation with respect to locked reference values, step 1%. zero disables. neg error band 0x0f ^o 27 0 (off) 0x00..0x64 1 64 0x0e 0x00..0x64 2 64 p/g tolerable positive reference deviation with respect to locked reference values, step 10%. zero disables. pos error band 0x0e ^n 27 0x02 0x02..0x0a 1 64 0x0d 0x02..0x0a 2 64 p/g period of qt pulses, in microseconds 2, 3, 4, 5, 6, 7, 8, 9, 10us intra-burst spacing 0x0d ^m 26 0x64 (10s) 0x00..0xff 1 1 0x0c 0x00..0xff 2 1, 8, 64 p/g time req ? d to tri gg er a recal from a detection, in 1s increments. zero disables recal. 0,1,2,3,5,7,10,15,20,32,45,60,90,123,175,255 secs neg recal delay 0x0c ^l 26 0x0a (1s) 0x00..0xff 1 1 0x0b 0x00..0xff 2 1, 8, 64 p/g time req ? d to trigger a recal from a positive signal excursion in 0.1s increments; zero disables recal. 0,.1,.2,.3,.5,.7,1,1.5,2,3.2,4.5,6,9,12.3,17.5,25.5 secs pos recal delay 0x0b ^k 26 0x03 0x00..0xff 1 1 0x0a 0x00..0xff 2 1, 8, 64 p/g number of detections required to register a touch, counted in bursts of detection; zero disables a key. 0,1,2,3,5,7,10,15,20,32,45,60,90,123,175,255 counts neg det int limit 0x0a ^j 26 0x0a (1s) 0x01..0x64 1 1 0x09 0x01..0x64 2 1, 8, 64 p/g rate of drift compensation for positive signal swings .1,.2,.3,.4,.6,.8,1,1.2,1.5,2,2.5,3.3,4.5,6,7.5,10 secs pos drift comp rate 0x09 ^i 26 0x1e (3s) 0x01..0x64 1 1 0x08 0x01..0x64 2 1, 8, 64 p/g rate of drift compensation for ne g ative si g nal swin g s .1,.2,.3,.4,.6,.8,1,1.2,1.5,2,2.5,3.3,4.5,6,7.5,10 secs neg drift comp rate 0x08 ^h 25 0x01 (300us) 0x00..0x05 1 64 0x07 0x00..0x05 2 64 p/g time from start of one burst to start of next burst 250us, 300us, 400us, 500us, 1000us, 2000us burst spacing 0x07 ^g 25 0x0c 0x01..0x40 1 1 0x06 0x00..0x40 2 1, 8, 64 p/g set g ain via number of qt c y cles / burst; zero disables burst 0,1,2,3,4,5,7,10,12,15,20,25,30,40,50,64 burst length 0x06 ^f 25 0x01 0x01 1 64 0x05 0x01 2 64 p/g delay from the rise of an x line to end of y-gate; only setting is 0x01 (167ns/period @ 6mhz xtal) dwell time 0x05 ^e 25 0x01 (25%) 0x00..0x03 1 1 0x04 0x00..0x03 2 64 p/g hysteresis for positive threshold 50%, 25%, 12.5%, 0% positive hysteresis 0x04 ^d 25 0x01 (25%) 0x00..0x03 1 1 0x03 0x00..0x03 2 64 p/g hysteresis for negative threshold 50%, 25%, 12.5%, 0% negative hysteresis 0x03 ^c 24 0x08 0x04..0x40 1 1 0x02 0x04..0x40 2 1, 8, 64 p/g sensitivit y to positive si g nals for recalibration 4,5,6,7,8,10,12,15,17,20,25,30,35,45,55,64 counts positive threshold 0x02 ^b 24 0x0c 0x04..0x40 1 1 0x01 0x04..0x40 2 1, 8, 64 p/g touch sensitivit y threshold; less = more 4,5,6,7,8,10,12,15,17,20,25,30,35,45,55,64 counts negative threshold 0x01 ^a setup commands return range bytes returned scope returns operand range bytes/put scope page default setting get mode put mode p/g description name hex char ? quantum research group ltd. l q 32 www.qprox.com qt60xx5 / r1.05
30 0 (off) 0x00, 0x01 1 - 0x17 0x00, 0x01 2 - p/g noise sync enable; 1 = on device must be reset to take effect noise sync 0x17 ^w 30 0x08 0x00..0xff 1 64 0x16 0x00..0xff 2 64 p/g boundary equation constant, c2 boundary c2 0x16 ^v 30 0xe9 0x00..0xff 1 64 0x15 0x00..0xff 2 64 p/g boundary equation constant, c1, lsb boundary c1 lsb 0x15 ^u 30 0x05 0x00..0x7f 1 64 0x14 0x00..0x7f 2 64 p/g boundary equation constant, c1, msb boundary c1 msb 0x14 ^t 29 0 0x00, 0x01 1 - 0x13 0x00, 0x01 2 - p/g cs clamp drive polarit y ; 0 = active-low; part must be reset via ? r ? command or hard reset to take effect cs clamp 0x13 ^s 29 0 (off) 0x00, 0x01 1 - 0x12 0x00, 0x01 2 1, 8, 64 p/g oscilloscope sync control. 1 = on. feature is volatile - cleared to 0 after each reset scope sync 0x12 ^r 29 0 (46.8k) 0x00..0x03 1 - 0x11 0x00..0x03 2 - p/g sets spi master-mode clock rate. part must be reset via ? r ? command or hard reset to take effect 46.875khz, 93.75khz, 375khz, 1.5mhz spi rate 0x11 ^q 29 - 0x5a, 0x5a 0x00 2 - p force device into sleep mode. ? z ? must be followed by a null within 100ms. 0x5a returned before and after entering sleep sleep 0x5a z 29 - 0x20, 0x30, 0x40 1 - g returns part signature number signature 0x57 w 29 - 0x00..0xff 1 - g returns part version number version 0x56 v 28 - 0x72 0x00 2 - p hard reset the device. ? r ? must be followed b y a null within 100ms. reset device 0x72 r 28 - 0x00..0xff 1 - g send back last command byte received return last command 0x6c l 28 - 0x62 1 1, 8, 64 p fully recalibrate keys; return byte is sent prior to calibration recal keys 0x62 b 28 - 0x4c 0x00 2 64 p locks reference levels into eeprom for future boundary checks. ? l ? must be followed by 0x00 (null) 100ms after the command byte lock references 0x4c l 28 - 0x44 0x00..0xff 2 - p sends operand to r2r dac; b y te 2 must be sent within 100ms of command byte dac test 0x44 d 0 - 0x00..0xff 1 - g returns checksum of internal eeprom eeprom checksum 0x36 6 supervisory commands return range bytes returned scope returns operand range bytes/put scope page default setting get mode put mode p/g description name hex char ? quantum research group ltd. l q 33 www.qprox.com qt60xx5 / r1.05
5.7 timing limitations the device requires processing time between bursts, as well as time to handle communications with the host. with short burst spacings, long burst lengths, and long intra-burst pulse spacings, the device can simply run out of available processing time. when this happens, burst timing and host communications can slow down and become erratic. burst spacings should be verified on an oscilloscope during development to be certain that the device timings are preserved and are constant. if not, the burst length and/or pulse spacing should be reduced. ? quantum research group ltd. l q 34 www.qprox.com qt60xx5 / r1.05 table 5-2 permissible burst lengths (bl?s) 64 2,000 64 2,000 64 2,000 64 2,000 40 1,000 40 1,000 50 1,000 50 1,000 30 500 30 500 30 500 40 500 20 400 20 400 25 400 30 400 10 300 12 300 12 300 15 300 5 250 7 250 7 250 7 250 max bl burs t spacing max bl burs t spacing max bl burs t spacing max bl burs t spacing pulse spacin g = 10s pulse spacin g = 9s pulse spacin g = 8s pulse spacin g = 7s 64 2,000 64 2,000 64 2,000 64 2,000 64 2,000 64 1,000 64 1,000 64 1,000 64 1,000 64 1,000 50 500 50 500 64 500 64 500 64 500 30 400 40 400 40 400 40 400 64 400 15 300 20 300 20 300 20 300 50 300 7 250 10 250 10 250 10 250 25 250 max bl burst spacing max bl burst spacing max bl burst spacing max bl burst spacing max bl burst spacing pulse spacin g = 6s pulse spacin g = 5s pulse spacin g = 4s pulse spacin g = 3s pulse spacin g = 2s
6 pld source listing pre-programmed parts are available from quantum in small quantities. the object code file for this pld is also available upon request. title 'e664spi' description timing skew generator for e664spi matrix board. code is for ict peel22cv10az epld. not warranted to work with any other part. compiler and documentation from the ict web site, www.ictpld.com. programmer from system general; model all writer, www.systemgeneral.com. end_desc; peel22cv10a "i/o configuration declaration "ioc (pin_no 'pin_name' polarity output_type feedback_type) "inputs y0 pin 5 "pre-decoded y inputs y1 pin 4 y2 pin 3 y3 pin 2 y4 pin 8 y5 pin 9 y6 pin 10 y7 pin 11 xs pin 1 "sum of x1..x7 x7 pin 6 "x7 input (gets or'd with xs) yg pin 7 "y gate trigger "outputs "clamping outputs ioc ( 21 'ym0' pos com feed_pin ) ioc ( 19 'ym1' pos com feed_pin ) ioc ( 17 'ym2' pos com feed_pin ) ioc ( 15 'ym3' pos com feed_pin ) ioc ( 16 'ym4' pos com feed_pin ) ioc ( 18 'ym5' pos com feed_pin ) ioc ( 20 'ym6' pos com feed_pin ) ioc ( 22 'ym7' pos com feed_pin ) "dly ckt drive out ioc ( 14 'xsd' pos com feed_pin ) "qs3251 neg enable ioc ( 23 'ygg' pos outcom feed_pin ) ar node 25 "global asynchronous reset sp node 26 "global synchronous preset define equations ar = 0; sp = 0; " define y clamp outputs ym0.com = 0; ym1.com = 0; ym2.com = 0; ym3.com = 0; ym4.com = 0; ym5.com = 0; ym6.com = 0; ym7.com = 0; "enable control. goes low on active y channel (y= active high to clamp) ym0.oe = y0; ym1.oe = y1; ym2.oe = y2; ym3.oe = y3; ym4.oe = y4; ym5.oe = y5; ym6.oe = y6; ym7.oe = y7; xsd.com = 0; xsd.oe = !(xs # x7); "clamp the delay cap when all 'x' lines are 0 ygg.com =!(yg & !xsd); "enable the 3251 so long as both yg is high and xsd is low "as soon as xsd goes high, disable the 3251 ? quantum research group ltd. l q 35 www.qprox.com qt60xx5 / r1.05
7 electrical specifications 7.1 absolute maximum specifications operating temp .................................................................. as designated by suffix storage temp ......................................................................... -55 o c to +125 o c v dd ..................................................................................... -0.5 to +5.5v max continuous pin current, any control or drive pin ................................................. 10ma short circuit duration to ground, any pin ............................................................infinite short circuit duration to v dd , any pin .............................................................. infinite voltage forced onto any pin ..................................................... -0.6v to ( vdd + 0.6) volts frequency of operation ......................................................................... 10mhz eeprom maximum writes ............................................................ 100,000 write cycles flash maximum writes (eeprom backup) .................................................1, 000 write cycles 7.2 recommended operating conditions v dd ................................................................................... + 4.75 to 5.25v supply ripple+noise ....................................................................... 5mv p-p max cx transverse load capacitance per key from x to y .............................................. 0 to 20pf fosc oscillator frequency ................................................................... 6mhz +/-2% 7.3 dc specifications vdd = 5.0v, cs = 15nf, freq = 6.00mhz, ta = recommended range, unless otherwise noted drdy, ss pins kohms 120 35 pullup resistors r p bits 8 acquisition resolution a r a 1 i nput le a k ag e current i il 1ma source v v dd - 0 .7 h i g h output v olt ag e v oh 4 ma sink v 0 .6 l o w output v olt ag e v ol v 2 . 2 h i g h input lo g ic le v el v hl v 0 . 8 l o w input lo g ic le v el v il v 4 b ro w n - out detection v olt ag e v bod n ot includin g e x tern a l components a 20 supply current, sleep i dds n ot includin g e x tern a l components ma 15 supply current, runnin g i ddr notes units max typ min description paramete r 7.4 timing f rom r2r setup to a in+ s a mple s 8.16 ad c del a y f rom r2r setup trad c mh z 1.5 sp i c lock r a te fck s 15 h ost comm a nd sp a ce tcm s 2,000 15 m ulti - byte return sp a cin g t dr 3 s 1,000 1 t dr del a y f rom response t dr 2 notes units max typ min description parameter ? quantum research group ltd. l q 36 www.qprox.com qt60xx5 / r1.05
7.5 maximum drdy response delays ... with adjacent key suppression disabled: 1ms 1ms 1.5ms 1.2ms 900us 800us all other commands 2ms 2ms 3.5ms 2.8ms 2.1ms 1.8ms get key errors (e), get keys pushed 4ms 4ms 9.5ms 7.6ms 5.7ms 4.8ms calibrate command (all keys) 800ms 800ms 800ms 800ms 800ms 800ms lock reference level (l) 300ms 300ms 300ms 300ms 300ms 300ms setup - put (affect 64 keys) 40ms 40ms 40ms 40ms 40ms 40ms setup - put (affect 8 keys) 10ms 10ms 10ms 10ms 10ms 10ms setup - put (affect 1 key) 2ms 1ms 500s 400s 300s 250s function type burst spacing ... with adjacent key suppression enabled: 2ms 2ms 3.5ms 2.4ms 1.8ms 1.5ms all other commands 2ms 2ms 5ms 4ms 3ms 2.5ms get key errors (e), get keys pushed 4ms 5ms 11ms 8.8ms 6.6ms 5.5ms calibrate command (all keys) 800ms 800ms 800ms 800ms 800ms 800ms lock reference level (l) 300ms 300ms 300ms 300ms 300ms 300ms setup - put (affect 64 keys) 40ms 40ms 40ms 40ms 40ms 40ms setup - put (affect 8 keys) 10ms 10ms 10ms 10ms 10ms 10ms setup - put (affect 1 key) 2ms 1ms 500s 400s 300s 250s function type burst spacing preliminary data: all specifications subject to change . ? quantum research group ltd. l q 37 www.qprox.com qt60xx5 / r1.05
8 mechanical 8.1 dimensions 8.2 marking ? quantum research group ltd. l q 38 www.qprox.com qt60xx5 / r1.05 1 2 3 4 8 7 6 5 11 10 9 33 32 31 30 28 23 24 25 26 27 29 12 14 16 18 22 20 15 17 19 21 13 44 42 40 38 36 34 43 41 37 39 35 symbol a e e h h l p p a millimeters inches min max notes min max notes e h h a e p a l o 12.21 11.75 0.458 0.478 0.09 0.20 0.003 0.008 0.45 0.05 0.75 0.15 1.20 0.018 0.002 0.030 0.006 0.047 0.80 0.30 bsc 8.00 0.80 0.45 0.031 0.012 bsc 0.315 0.031 0.018 9.90 10.10 0.386 0.394 - - o07 07 p bsc bsc sq sq sq sq package type: 44 pin tqfp 8.00 0.315 qt6 0 64 5 - as qt6 0 64 5 - as -4 0 0 c to + 105 0 c qt6 0 4 85 - as qt6 0 4 85 - as -4 0 0 c to + 105 0 c qt6 0325 - as qt6 0325 - as -4 0 0 c to + 105 0 c qt6 0 64 5 - s qt6 0 64 5 - s 0 0 c to +7 0 0 c qt6 0 4 85 - s qt6 0 4 85 - s 0 0 c to +7 0 0 c qt6 0325 - s qt6 0325 - s 0 0 c to +7 0 0 c marking tqfp t a
a adc subranging, 4, 5 adjacent key suppression, 8, 27 alert output, 15 application assistance, 5 b block diagram, 5 boundary equation, 30, 33 burst length, 8, 9, 12, 20, 24, 25, 28, 34 burst spacing, 6, 25, 34 burst timing, 9, 19 c calibration, 8, 13, 14, 15, 20, 21, 28 charge cancellation, 4, 9, 22 charge gate, 9 charge integrator, 4, 5, 9, 12, 13, 29 charge neutralization, 9 circuit model, 4, 5 cs, 6, 9, 13, 15, 29 cs clamp polarity, 29 csr drive polarity, 15 cx, 4, 6, 8, 9, 21, 25 cz, 5, 6, 7, 8, 9, 13, 14, 21, 28 d dac test, 28 delta signals, 22 detect integrator, 22, 26 detection integrator, 6, 7, 22 device status, 22 device variations, 5 dimensions, 38 direction commands, 20 drdy?, 17, 18 drift compensation, 6, 7, 8, 13, 15, 20, 23, 24, 26 dwell, 34 gate dwell, 5, 9, 12, 13, 14, 16, 25 e echo, 18, 19, 24, 28 eeprom checksum, 22, 28 electrostatic shield, 15 emi, 4, 27 error code, 23 error byte, 23 error guardbanding, 7 esd protection, 16 f fast-recalibration, 7, 8 field flow, 4 function summary table, 31 g gate dwell dwell, 5, 9, 12, 13, 14, 16, 25 get command, 20 ground plane, 15 h hard reset, 8 hysteresis, 6, 25, 26, 32 i intra-burst pulse spacing, 12, 27, 34 j jfet, 13 k key design, 5 key numbering convention, 21 key reporting, 23, 24 l ladder dac r2r ladder, 5, 7, 9, 14 led, 15 lock reference levels, 7, 17, 28 m marking, 38 master mode, 16, 18, 19 master-slave mode, 16, 18 matrix configuration, 5 mechanical, 38 miso, 17, 18 mosi, 14, 17, 18, 19 multi-byte responses, 18, 19 n negative detect integrator, 26 negative detect threshold, 12, 24 negative error band, 27 negative recalibration delay, 6, 26 negative threshold, 5, 6, 8, 12, 25, 26 noise, 12, 15, 16, 24, 26 noise coupling, 12 o offset, 5, 6, 7, 8, 9, 13, 14, 21, 22, 28 opamp, 13 oscillator, 14, 16 oscilloscope sync, 15 p pcb layout, 15 peel22cv10az, 13, 35 pld, 9, 12, 13, 14, 16, 35 positive detect threshold, 24 positive drift compensation, 26 positive error band, 27 positive recal delay, 7, 8 positive recalibration delay, 7, 26 positive threshold, 6, 7, 8, 25, 26 power supply, 15 put command, 20 q qmbtn, 4, 15, 16 ? quantum research group ltd. lq 39 www.qprox.com qt60xx5 / r1.05 9 index
qs3251, 12, 13, 16, 35 qt60325, 9, 29 qt60485, 9, 29 r r2r ladder ladder dac, 5, 7, 9, 14 recalibrate keys (command), 28 recalibration, 6, 7, 8, 13, 23, 24, 26, 28, 30 reference level, 4, 6, 7, 8, 25, 26, 27 reference levels, 22 reference window boundary, 8 reset, 4, 7, 8, 9, 13, 14, 15, 20, 21, 28, 29, 30, 35 resonator, 14, 15 response delays, 17, 37 return last command, 28 return part signature, 29 return part version, 29 rf emissions, 5 s scan sequence matrix scan sequence, 9 sck, 17, 18, 19 scope, 16, 20, 21 scope commands, 21 sensitivity, 12 serial interface, 16 setup commands, 20, 24 signal gain, 9, 13, 25 signal levels, 4, 22 signal processing, 4, 5 slave mode, 16, 17, 18, 19 sleep mode, 14, 29 sleep_wake, 14, 15 soft reset, 8 spi, 4, 15, 16, 17, 18, 19, 20, 29 spi interface, 4 spi noise problems, 16 spi rate, 29 ss ? , 17, 18, 19 startup, 13, 14, 15 status commands, 20, 21 subranging adc, 4, 5 supervisory functions, 20, 28 sync, 14, 15, 16, 18, 22, 29, 30 t threshold level, 6, 7, 25, 26 timing limitations, 34 tlc2272, 13 u uart, 16 v vdd, 15, 16 vee, 15 virtual ground, 4 w water films, 4, 14, 27 x x electrode drives, 9 x2ws, 14 y y gate drives, 12 yc0..yc7, 12 ys0..ys2, 12 ? quantum research group ltd. lq 40 www.qprox.com qt60xx5 / r1.05
notes - ? quantum research group ltd. qt60xx5 / r1.05
? quantum research group ltd. qt60xx5 / r1.05 l q ? 2002 qrg ltd. patented and patents pending corporate headquarters 1 mitchell point ensign way, hamble so31 4rf great britain tel: +44 (0)23 8056 5600 fax: +44 (0)23 8045 3939 admin@qprox.com www.qprox.com north america 651 holiday drive bldg. 5 / 300 pittsburgh, pa 15220 usa tel: 412-391-7367 fax: 412-291-1015 all specifications subject to change. this device expressly not for use in any medical or human safety related application without the express written consent of an officer of the company.

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